Preamble Detection Without Interpolation Using Sign Comparison

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Solution Overview

Problem

Current read channels face significant performance loss and inaccurate preamble detection at high noise conditions due to interpolation-based methods, leading to increased loop latency and performance degradation.

Innovation Solution

A method that detects the end of a preamble without interpolation by using a zero phase start module to select and decimate samples from short and long filters, ensuring the selected samples are closer to peak points based on target phase and ZPS information, and performing a sign comparison to determine the end of the preamble.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If interpolation-based preamble detection is used, then the detection method is simple to implement, but the detection accuracy deteriorates at high noise conditions

Engineering Contradiction:
Improveimplementation simplicityVSAvoidpreamble detection accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent changes the detection parameter from interpolated sample values to sign bits of filtered samples. By using sign comparison instead of magnitude comparison of interpolated values, the system achieves better noise immunity while maintaining implementation simplicity. The sign bit operation is computationally simple yet provides robust detection at high noise conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts only the essential information (sign bits) from the filtered samples rather than using the full interpolated values. This extraction of critical features (sign changes) eliminates the noise sensitivity inherent in interpolation-based magnitude comparison while keeping the implementation straightforward.

Inventive Principle:
Principle #2Taking out (Extraction)

2Speed

If interpolation-based preamble detection is used, then the detection process is fast, but the loop latency increases due to inaccurate detection

Engineering Contradiction:
Improvedetection speedVSAvoidloop latency
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent implements a feedback mechanism where the detected preamble end position triggers updates to the equalizer and other channel processing components. This feedback loop ensures that accurate detection (without interpolation errors) leads to timely updates, reducing the effective loop latency by preventing re-detection delays caused by inaccurate interpolation-based methods.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

By changing from interpolated value comparison to sign bit comparison, the detection becomes more reliable at high noise conditions, preventing false detections that would cause re-processing delays and increase loop latency.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If interpolation-based preamble detection is used, then the system operates at standard sampling rates, but the noise margin decreases

Engineering Contradiction:
Improveoperational efficiencyVSAvoidnoise margin
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent converts the harmful effect of high noise into a benefit by using sign bit comparison. Instead of being affected by noise magnitude variations, the sign bit provides a binary decision that is inherently more robust. The noise that would normally degrade interpolated value accuracy is transformed into a less significant factor when only sign transitions are monitored.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the detection parameter from continuous interpolated values to discrete sign bits, creating a more noise-resistant detection mechanism that maintains operational efficiency while significantly improving the noise margin.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9111573B1Detection of end of preamble in read channel without interpolation
Publication Date: 2015.08.18 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9111573B1 patent drawing
  • US9111573B1 patent drawing
  • US9111573B1 patent drawing

AI summary

A method and system for detecting an end of a preamble without interpolation. The method includes receiving information from a zero phase start module, the information including a target phase constraint, a polyant, and a zero phase start phase. The method also includes selecting two samples per preamble cycle of short filter outputs and long filter outputs based on the target phase constraint, the polyant, and the zero phase start phase. The method further includes decimating the short filter outputs and the long filter outputs such that the selected two samples for each of the filters per preamble cycle are output upon decimation. The method additionally includes performing a sign comparison on the corresponding short filter and long filter outputs after decimation, wherein a sign mismatch of the corresponding short filter and long filter outputs indicates an end of a preamble.