Output Buffer Pre-Buffer Filtering for Stable High-Speed I/O
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Solution Overview
Problem
High data input/output frequencies challenge the capability of output buffers in maintaining signal integrity due to variations in output resistance and supply voltage, affecting the accuracy of output data.
Innovation Solution
The implementation of pre-buffer voltage supply filtering using a portion of total capacitance for each pre-buffer driving final NMOS and PMOS transistors, in addition to the remaining capacitance between voltage supply lines, stabilizes the gate voltage of these transistors, improving output buffer capabilities without requiring additional total capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large capacitance is used to stabilize the supply voltage applied to the output buffer, then the supply voltage stability is improved, but the physical device size increases
Solution Approach 1:
The patent divides the single large capacitance into multiple smaller capacitances (first capacitance and second capacitance) that are distributed across different power supply lines. This segmentation allows the same total capacitance value to be achieved without requiring a single large capacitor, thereby reducing the area occupied on the chip while maintaining supply voltage stability.
Solution Approach 2:
The patent applies different capacitance values to different power supply lines (first power supply line and second power supply line) based on their specific requirements. The first capacitance is coupled to the first power supply line and the second capacitance to the second power supply line, optimizing the stabilization effect for each line individually while minimizing total area usage.
2Reliability
If the output resistance of the output buffer is kept constant, then the signal integrity is improved, but the device complexity increases
Solution Approach 1:
The patent applies filtering circuits to the power supply lines before they reach the output buffer, preliminarily stabilizing the power supply voltage and reducing noise. This preliminary action prevents power supply variations from affecting the output buffer operation, thereby maintaining constant output resistance and signal integrity without requiring complex internal compensation circuits within the buffer itself.
Solution Approach 2:
The patent introduces filtering circuits as intermediary elements between the power supply and the output buffer. These filtering circuits act as mediators that clean the power supply voltage before it reaches the buffer, isolating the buffer from power supply noise and variations, thus maintaining stable output characteristics without increasing buffer complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces variance in gate voltage, enhancing signal integrity and allowing for higher data processing speeds without increasing physical device size, as demonstrated by improved eye-diagram horizontal eye-opening percentages.
Implementation Method 1
A capacitor having a sufficiently large capacitance coupled between voltage supply lines (e.g., VDD and VSS) for the output buffer has been used to improve the capability of the output buffer in ensuring integrity of digital signals at high frequencies.
Implementation Method 2
pre-buffer voltage supply filtering to further improve that capability by stabilizing the gate voltage of each of the final NMOS and PMOS transistors
Data Source
AI summary
An electronic device may include one or more output buffers each including a pair of final p-channel metal oxide semiconductor (PMOS) and n-channel metal oxide semiconductor (NMOS) transistors, a first pre-buffer to drive the PMOS transistor, and a second pre-buffer to drive the NMOS transistor. Each output buffer receives power from a pre-buffer supply filtering circuit, which may include a supply capacitor for stabilizing supply voltage, a low-pass first pre-buffer supply filter to filter the voltage supplied to the first pre-buffer, and a low-pass second pre-buffer supply filter the voltage supplied to the second pre-buffer.