Voltage Level Shifter With Pre-Charge Boost to Reduce Voltage Fighting

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Solution Overview

Problem

Conventional voltage level shifters experience significant power consumption and reduced signal transition speed due to equivalent driving abilities of pull-up and pull-down elements causing fierce voltage fighting during voltage switching.

Innovation Solution

A voltage level shifter with a boost circuit that pre-charges and boosts the voltage values on multiple input terminals, reducing the driving ability of the pull-up element and minimizing voltage fighting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional voltage level shifter with equivalent pull-up and pull-down elements is used, then the circuit structure is simple, but fierce voltage fighting occurs causing high power consumption and reduced signal transition speed

Engineering Contradiction:
Improvecircuit structureVSAvoidsignal transition speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent introduces a boost circuit that provides different voltage levels to the pull-up and pull-down elements during transitions. Specifically, when switching from low to high voltage, the pull-up element receives a boosted voltage (VBOOST) while the pull-down element receives the normal voltage (VSS), creating an asymmetric driving condition that eliminates voltage fighting and improves transition speed without significantly increasing circuit complexity

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The boost circuit pre-charges the boost input terminals to VBOOST before the actual voltage transition occurs. This preliminary action ensures that when the pull-up element needs to switch, it already has the higher voltage available, reducing the time required for the transition and minimizing the period of voltage fighting

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If conventional voltage level shifter with equivalent driving abilities is used, then the circuit design is straightforward, but power consumption increases due to voltage fighting

Engineering Contradiction:
Improvecircuit designVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent creates asymmetric driving conditions by applying different voltages to the pull-up and pull-down elements through the boost circuit. During low-to-high transitions, the pull-up element is driven by VBOOST while the pull-down element is driven by VSS, preventing simultaneous strong driving in opposite directions and thereby reducing power consumption from voltage fighting

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The boost circuit operates periodically, activating VBOOST only during the specific time window when low-to-high voltage transitions are needed. During high-to-low transitions, the circuit reverts to normal operation with both elements driven by VSS. This periodic activation reduces overall power consumption compared to continuous high-voltage driving

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS20260100708A1Voltage level shifter
Publication Date: 2026.04.09 WINBOND ELECTRONICS CORP
  • US20260100708A1 patent drawing
  • US20260100708A1 patent drawing
  • US20260100708A1 patent drawing

AI summary

A voltage level shifter is provided. The voltage level shifter includes a voltage level shift circuit and a boost circuit. The voltage level shift circuit includes a first boost input terminal, a second boost input terminal, a first reference input terminal and a second reference input terminal. The voltage level shift circuit operates between a first voltage and a second voltage. The boost circuit is coupled to the voltage level shift circuit. The boost circuit is configured to pre-charge the first boost input terminal and the second boost input terminal to a third voltage value, and to boost the third voltage value to a fourth voltage value according to pair of differential signals provided to the first reference input terminal and the second reference input terminal.