Precharge Control Circuit for Semiconductor Memory Current Reduction
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Solution Overview
Problem
Semiconductor memory devices experience increased current consumption due to unnecessary precharging of input and output lines during continuous writing operations, which is inefficient and wasteful.
Innovation Solution
A semiconductor memory device with a precharge control circuit that generates a precharge control signal to disable the input and output lines after the first write command, maintaining this disabled state even after the second write command, using a precharge blocking unit and logic circuits to manage the precharge control signal and synchronize it with internal clock signals, thereby reducing unnecessary precharging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the precharging circuit precharges the input and output lines between successive write operations, then the reliability of data transfer is improved, but the current consumption increases during continuous write operations
Solution Approach 1:
The precharge control signal is made dynamic by adjusting its assertion behavior based on the write operation pattern. When continuous write operations are detected, the signal remains deasserted between writes; when writes are separated by other operations, the signal is asserted to precharge lines, optimizing both reliability and energy consumption adaptively
Solution Approach 2:
The timing and state of the precharge control signal parameter is changed based on operational context. The signal transitions from always being asserted to conditionally being asserted based on whether continuous write operations are detected, changing the electrical state parameter of the precharge circuit
2Reliability
If the precharge control signal is asserted between every write operation, then the input and output lines are properly prepared for next operation, but unnecessary precharging occurs during continuous writes increasing power loss
Solution Approach 1:
The unnecessary precharge action is extracted and removed from the continuous write operation sequence. The precharge control signal is taken out of the always-asserted state and selectively removed only during continuous write operations, eliminating wasted energy while preserving necessary precharging
Solution Approach 2:
The useful write operation continues without interruption by eliminating the intermediate precharge action. By keeping the precharge control signal deasserted during continuous writes, the write operations can proceed back-to-back without the overhead of unnecessary precharging cycles
Data Source
AI summary
We describe a semiconductor memory device having a precharge control circuit and an associated method for precharging the same. A semiconductor memory device having a series of circuits for writing data to memory cells includes an input and output line for transferring data to be written to each of the memory cells. A precharge control circuit is adapted to generate a precharge control signal for controlling a precharge disable state of the input and output line after application of a first write command. The disable state of the precharge control signal is maintained even after application of a second write command when performing a continuous write operation responsive to the second write command application without other commands applied subsequent to the first write command application. Avoiding precharging the input and output line in a continuous write operation, reduces current consumption.