Neural Network Output Circuit for Precision-Adaptive Sampling
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Solution Overview
Problem
Existing neural network circuits face challenges in meeting computation precision requirements due to fixed precision of DAC and ADC, leading to inefficiencies in power consumption and performance, especially in cases of low or high precision needs.
Innovation Solution
A neural network circuit that adjusts output precision based on computation precision changes by using a parameter adjustment circuit to control reference voltage generation and sampling frequency, ensuring optimal power consumption and precision alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If fixed precision DAC and ADC are used in the neural network circuit, then the circuit structure is simple, but the computation precision requirement cannot be met when low precision is needed and power consumption increases when high precision is needed
Solution Approach 1:
The patent applies dynamics by making the precision of DAC and ADC adjustable rather than fixed. The parameter adjustment circuit dynamically configures the precision of these converters based on the computation precision requirement, allowing the system to adapt its precision characteristics to match the actual computational needs of different neural network layers or operations.
Solution Approach 2:
The patent implements parameter changes by modifying the precision parameters of DAC and ADC through a parameter adjustment circuit. This circuit changes the operational parameters of the converters to match the computation precision requirements, enabling the system to optimize power consumption by using lower precision when sufficient and higher precision only when necessary.
2Measurement precision
If fixed precision DAC and ADC are used in the neural network circuit, then the circuit structure is simple, but the output precision cannot adapt to changes in computation precision
Solution Approach 1:
The patent applies dynamics by making the precision of DAC and ADC adjustable rather than fixed. The parameter adjustment circuit dynamically configures the precision of these converters based on the computation precision requirement, allowing the system to adapt its precision characteristics to match the actual computational needs of different neural network layers or operations.
Solution Approach 2:
The patent implements parameter changes by modifying the precision parameters of DAC and ADC through a parameter adjustment circuit. This circuit changes the operational parameters of the converters to match the computation precision requirements, enabling the system to optimize power consumption by using lower precision when sufficient and higher precision only when necessary.
3Measurement precision
If high precision is always used in the neural network circuit, then the computation precision requirement is met, but power consumption is wasted
Solution Approach 1:
The patent applies partial action by using only the precision level that is actually needed for each computation task. Instead of always using high precision, the parameter adjustment circuit configures DAC and ADC to use the minimum necessary precision for each neural network operation, avoiding the energy waste associated with always operating at maximum precision.
Solution Approach 2:
The patent implements parameter changes by modifying the precision parameters of DAC and ADC through a parameter adjustment circuit. This circuit changes the operational parameters of the converters to match the computation precision requirements, enabling the system to optimize power consumption by using lower precision when sufficient and higher precision only when necessary.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit adapts to varying precision demands, avoiding inefficiencies in power consumption and precision mismatches, thereby enhancing computational efficiency and reducing power waste.
Implementation Method 1
a weight is stored in a cell in advance in a form of conductance. After being processed by a digital-to-analog converter (DAC), input data enters a computation array in a form of voltage. Subsequently, the voltage undergoes corresponding conductance to form currents
Data Source
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AI summary
This application provides a neural network circuit, including: a first sample-and-hold circuit, a reference voltage generation circuit, a first comparator circuit, and a first output circuit. The first sample-and-hold circuit is configured to generate a first analog voltage based on a first output current output by a first neural network computation array. The reference voltage generation circuit is configured to generate a reference voltage based on a first control signal. The first control signal is determined based on first computation precision. The first comparator circuit is connected to the first sample-and-hold circuit and the reference voltage generation circuit, and is configured to output a first level signal based on the first analog voltage and the reference voltage. The first output circuit is configured to sample the first level signal based on a second control signal, and output a first computation result that meets the first computation precision, and the second control signal is used to control a frequency at which the first level signal is sampled. The sampling frequency of the first output circuit and duration of the first level signal can be adjusted to adapt to computation precision of the neural network. This avoids that a computation precision requirement cannot be met in a case of low precision, and that a waste of power consumption is caused in a case of high precision