MIMO Precoding with Bit Length Adjustment for LDPC Mapping
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Solution Overview
Problem
Implementing the MIMO scheme with LDPC coding poses challenges due to bit length mismatches between different signal streams.
Innovation Solution
A data processing scheme that includes an encoding step for generating N-bit codewords, a mapping step for creating complex signals, and a bit length adjustment step to ensure that the bit length of the second bit sequence is a multiple of X+Y, where X and Y represent the number of bits for the first and second complex signals, respectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC coding is applied to MIMO scheme, then error correction capability is improved, but bit length mismatch between signal streams occurs
Solution Approach 1:
The patent applies preliminary action by performing bit length adjustment before the mapping step. The bit length adjustment unit adjusts the length of the first bit sequence to be a multiple of (X+Y) bits, where X and Y are the number of bits for first and second complex signals respectively. This preliminary adjustment prevents bit length mismatch from occurring downstream in the signal processing chain, enabling LDPC coding to be applied to MIMO without causing synchronization issues.
2Adaptability or versatility
If bit length adjustment is performed, then bit length compatibility is improved, but data processing complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the bit sequence length parameter to satisfy the condition that the length is a multiple of (X+Y). The bit length adjustment unit changes the length parameter of the first bit sequence through padding or truncation operations, making it compatible with the requirements of the subsequent mapping step that generates multiple complex signals with specific bit requirements.
Data Source
AI summary
An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.