MIMO Precoding with Dummy-Bit Alignment for LDPC Codewords
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Solution Overview
Problem
Implementing the MIMO scheme is challenging when using coding schemes like LDPC coding due to bit length mismatches and compatibility issues.
Innovation Solution
A data processing scheme that includes an encoding step for generating N-bit codewords, a mapping step for creating complex signals, and a bit length adjustment step to ensure the second bit sequence has a length that is a multiple of X+Y bits, facilitating the MIMO scheme's implementation with LDPC coding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If LDPC coding is applied in MIMO scheme, then data transfer rate and reception quality are improved, but bit length mismatches and compatibility issues occur between encoding output and MIMO processing requirements
Solution Approach 1:
The patent changes the parameter of bit sequence length by inserting dummy bits to transform the N-bit LDPC codeword into a bit sequence with length that is a multiple of X+Y bits. This parameter transformation enables compatibility between LDPC coding output and MIMO processing requirements while maintaining the original data integrity through subsequent extraction of valid bits after mapping.
2Adaptability or versatility
If bit length adjustment is performed by inserting dummy bits, then MIMO compatibility is achieved, but processing complexity increases
Solution Approach 1:
The patent performs preliminary action by inserting dummy bits into the LDPC codeword before the mapping process. This preliminary bit length adjustment ensures that the bit sequence is ready for MIMO processing without requiring complex real-time adjustments during mapping, thereby reducing overall processing complexity while achieving MIMO compatibility.
Data Source
AI summary
An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s1 and a second complex signal s2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s1, and Y indicates the number of bits used to generate the second complex signal s2. A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.