Precompiled Logic Analyzer Configurations for PLD Signal Access

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Solution Overview

Problem

The existing methods for verifying electronic system designs are inefficient due to slow simulation times and challenging access to internal signals in prototypes, which delays defect localization.

Innovation Solution

A system comprising a generator, compiler, selector, programmable logic device (PLD), and monitor that pre-compiles multiple configurations with logic analyzers to quickly access specified signals, reducing the delay between signal specification and availability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If simulation is used to verify electronic system operation, then control of stimulus and observation of behavior is improved, but verification time increases significantly

Engineering Contradiction:

Improvecontrol of stimulus and observationVSAvoidverification time

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The patent pre-identifies and pre-configures logic analyzers to monitor specific signals during operation. By preparing the monitoring infrastructure in advance rather than setting it up during verification, the system enables rapid access to internal signals without requiring time-consuming configuration steps when defects are discovered.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If a prototype is used to discover defects not detectable in simulation, then defect detection capability is improved, but access to internal signals becomes challenging

Engineering Contradiction:

Improvedefect detection capabilityVSAvoidaccess to internal signals

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The system pre-configures logic analyzers during design to monitor specific internal signals in the prototype. This preliminary setup ensures that when the prototype is used for defect detection, the monitoring infrastructure is already in place, eliminating the challenge of accessing internal signals during prototype testing.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces logic analyzers as intermediary devices between the internal signals and the observer. These analyzers act as mediators that capture and make accessible signals that would otherwise be difficult to observe directly in a prototype, enabling efficient defect localization.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Productivity

If Chipscope logic analyzers are used to access internal signals, then defect localization speed is improved, but compilation time increases for each signal set

Engineering Contradiction:

Improvedefect localization speedVSAvoidcompilation time

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system creates a universal monitoring infrastructure that can be configured to watch different signal sets without requiring separate compilation processes. The logic analyzers are designed to be flexible and adaptable, allowing the same hardware infrastructure to serve multiple defect localization needs through software configuration rather than recompilation.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Measurement precision

If iterative defect tracing is performed through multiple logic levels, then defect localization accuracy is improved, but time consumption increases due to repeated compilation

Engineering Contradiction:

Improvedefect localization accuracyVSAvoiditerative tracing time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent pre-configures logic analyzers during design to monitor specific signals during operation. By preparing the monitoring infrastructure in advance rather than setting it up during verification, the system enables rapid access to internal signals without requiring time-consuming configuration steps when defects are discovered.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system maintains continuous monitoring capability across multiple tracing iterations. Once the logic analyzers are configured, they continuously monitor signals without interruption, allowing defect tracing to proceed smoothly through multiple logic levels without stopping for recompilation, thus maintaining the continuity of the diagnostic process.

Inventive Principle:

Principle #20Continuity of useful action

Data Source

PatentUS7353474B1System and method for accessing signals of a user design in a programmable logic device

Publication Date: 2008.04.01 XILINX INC

AI summary

Access to a signals of a user design in a programmable logic device (PLD) is provided without a compilation delay following selection of the signals. The system may include a generator, a compiler, a selector, the PLD, and a monitor. The generator selects sets of signals of the user design, and for each set of signals, generates a respective supplement of a subset of the user design supplementing the subset with a logic analyzer coupled to the set of signals. The compiler generates a respective configuration for each supplement. The selector selects a configuration or multiple configurations responsive to the specified set of signals and the sets of signals. The PLD implements the user design after the PLD is programmed with the selected configuration or configurations. The monitor accesses the specified set of signals in the PLD via the logic analyzer corresponding to each of the selected configuration or configurations.