Pre-Conversion Instructions for Accurate Floating-Point Rounding
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Solution Overview
Problem
Double rounding errors occur when converting floating point numbers from one format to a narrower format, as intermediate rounding can produce different results compared to direct rounding, leading to inaccuracies.
Innovation Solution
Incorporating a floating point pre-conversion instruction that rounds the mantissa field to an intermediate length and pads with zeros, ensuring subsequent rounding operations discard only trailing zeros, thus avoiding double rounding errors. Additionally, an integer pre-conversion instruction quantizes input integers to match the target floating point format, facilitating accurate conversions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If floating point numbers are converted from a wider format to a narrower format through intermediate rounding, then the conversion process can be simplified into manageable stages, but double rounding errors occur that reduce calculation accuracy
Solution Approach 1:
The patent applies preliminary action by performing the rounding operation in advance during a pre-conversion step, rather than during the final conversion. The pre-conversion instruction rounds the mantissa to the target precision and stores it with padding zeros, so that subsequent conversions simply truncate without performing additional rounding. This eliminates double rounding errors while maintaining the benefit of staged conversion processes.
2Adaptability or versatility
If multiple floating point formats are supported in the data processing system, then the system becomes more versatile and adaptable, but the complexity of managing conversions between formats increases
Solution Approach 1:
The patent introduces a pre-conversion instruction that performs rounding to the target format's mantissa precision in advance. This preliminary rounding step, combined with padding the mantissa with zeros, creates a standardized intermediate representation that simplifies subsequent conversions between different floating point formats, reducing the complexity of managing multiple format conversions.
Solution Approach 2:
The patent uses a standardized intermediate floating point representation as a mediator between different floating point formats. The pre-conversion produces an intermediate format with the target mantissa precision and padding zeros, which serves as a common denominator for conversions between various floating point formats (e.g., 64-bit to 32-bit, 32-bit to 16-bit), simplifying the conversion management complexity.
3Productivity
If the mantissa field is reduced in size during floating point conversion, then the output fits the narrower format requirements, but rounding errors are introduced that degrade data quality
Solution Approach 1:
The patent performs the rounding action in advance during the pre-conversion step, reducing the mantissa to the target precision and padding with zeros. This preliminary rounding ensures that the final conversion simply truncates without introducing additional rounding errors, thereby maintaining mantissa accuracy while achieving the required output format efficiency.
Data Source
AI summary
Apparatus for processing data includes processing circuitry 16, 18, 20, 22, 24, 26 and decoder circuitry 14 for decoding program instructions. The program instructions decoded include a floating point pre-conversion instruction which performs round-to-nearest ties to even rounding upon the mantissa field of an input floating number to generate an output floating point number with the same mantissa length but with the mantissa rounded to a position corresponding to a shorter mantissa field. The output mantissa field includes a suffix of zero values concatenated the rounded value. The decoder for circuitry 14 is also responsive to an integer pre-conversion instruction to quantize and input integer value using round-to-nearest ties to even rounding to form an output integer operand with a number of significant bits matched to the mantissa size of a floating point number to which the integer is later to be converted using an integer-to-floating point conversion instruction.


