Predecode Return Address Prediction for Legacy Subroutine Calls

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Solution Overview

Problem

Modern processors with deep pipelines face challenges in predicting the return address for branch return instructions in legacy software that does not use conventional branch and link instructions, leading to branch mispredicts and increased power consumption due to speculative execution down an incorrect path.

Innovation Solution

The method involves recognizing an implicit subroutine call and calculating a return address, which is then stored in an explicit subroutine resource to facilitate branch prediction, allowing for accurate prediction of the return address even in the absence of a link stack structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional branch and link instructions are used for subroutine calls, then accurate branch prediction can be achieved using link stack structures, but legacy software compatibility is lost and device complexity increases

Engineering Contradiction:

Improvebranch prediction accuracyVSAvoidlegacy software compatibility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces an intermediary mechanism that translates implicit subroutine calls (legacy style) into explicit call patterns that work with modern branch prediction hardware. The system uses predecode information and return address generation logic as intermediaries to bridge between legacy software conventions and modern processor architecture requirements, enabling both legacy compatibility and accurate prediction.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by precalculating and storing return addresses during the decode stage, before the actual subroutine call executes. This advance preparation of return address information enables the branch prediction mechanism to function correctly with implicit calls, resolving the contradiction between legacy compatibility and prediction accuracy.

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If branch prediction is attempted for implicit subroutine calls without link stack structures, then legacy software can be executed, but branch mispredicts increase leading to higher power consumption

Engineering Contradiction:

Improvelegacy software execution capabilityVSAvoidpower consumption due to speculative execution

Core Design Contradiction:

Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary calculation and storage of return addresses during the decode stage, using predecode information to identify implicit subroutine calls. This advance preparation ensures that when branch prediction is attempted, accurate return address information is already available, reducing mispredicts and the associated power consumption from flushing speculative instructions.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If link stack structures are implemented for explicit subroutine calls, then return address prediction is facilitated, but device complexity and resource requirements increase

Engineering Contradiction:

Improvereturn address prediction capabilityVSAvoidlink stack structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the essential function of link stack structures (storing return addresses) and implements it in a simplified manner using predecode information and dedicated return address generation logic. Instead of full link stack structures, the system uses a streamlined approach that captures only the necessary return address functionality, reducing complexity while maintaining prediction capability.

Inventive Principle:

Principle #2Taking out (Extraction)

4Reliability

If implicit subroutine calls are recognized and return addresses are precalculated, then branch prediction accuracy improves, but decode stage complexity increases

Engineering Contradiction:

Improvebranch prediction accuracyVSAvoiddecode stage complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The system implements a universal decode stage logic that handles both explicit and implicit subroutine calls through a unified mechanism. The predecode information structure and return address generation logic serve multiple purposes: identifying call types, calculating return addresses, and interfacing with branch prediction, thereby managing complexity through multi-functionality rather than separate dedicated circuits for each call type.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS8943300B2Method and apparatus for generating return address predictions for implicit and explicit subroutine calls using predecode information

Publication Date: 2015.01.27 QUALCOMM INC

AI summary

An apparatus for emulating the branch prediction behavior of an explicit subroutine call is disclosed. The apparatus includes a first input which is configured to receive an instruction address and a second input. The second input is configured to receive predecode information which describes the instruction address as being related to an implicit subroutine call to a subroutine. In response to the predecode information, the apparatus also includes an adder configured to add a constant to the instruction address defining a return address, causing the return address to be stored to an explicit subroutine resource, thus, facilitating subsequent branch prediction of a return call instruction.