Predecoding-Gated Viterbi Decoder for Lower Power Use

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Solution Overview

Problem

Viterbi decoders are resource-hungry and consume high power, which is a challenge in power-constrained environments such as wireless communications, where reducing power consumption is advantageous.

Innovation Solution

Implementing a low-power Viterbi decoding system that includes predecoding logic to decode data before it reaches the Viterbi decoder, with detection logic to determine if the data is error-free, enabling the Viterbi decoder only when necessary and disabling it to conserve power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a Viterbi decoder is used to decode encoded data, then decoding accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvedecoding accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The decoding process is segmented into two stages: a predecoding stage using simplified logic and a Viterbi decoding stage using the full Viterbi decoder. The predecoder handles easy cases with low complexity, while the Viterbi decoder processes only the remaining difficult cases, thus reducing overall power consumption while maintaining decoding accuracy.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The predecoder performs preliminary decoding before the Viterbi decoder is engaged. By pre-processing the encoded data and identifying cases that can be decoded successfully with simpler logic, the system avoids activating the power-hungry Viterbi decoder unnecessarily, thereby reducing power consumption while preserving reliability for detectable error-free cases.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If predecoding logic is added to reduce power consumption, then power usage is reduced, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The predecoder acts as an intermediary component between the encoded data input and the Viterbi decoder. It filters and pre-processes the data, passing only necessary cases to the Viterbi decoder. This intermediary structure manages complexity by organizing the decoding flow into distinct stages with clear interfaces, making the overall system more manageable despite the added component.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If the Viterbi decoder is disabled to save power, then power consumption is reduced, but decoding reliability may deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoiddecoding accuracy
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The system dynamically switches between predecoding mode and Viterbi decoding mode based on the characteristics of the incoming encoded data. The predecoder continuously monitors the data and activates the Viterbi decoder only when necessary, creating a dynamic adaptation that balances power consumption with decoding reliability in real-time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The predecoder provides feedback about the encoded data quality and characteristics to control whether the Viterbi decoder should be activated. This feedback mechanism ensures that the Viterbi decoder is enabled only when the predecoder detects conditions that require its full decoding capability, thereby maintaining reliability while minimizing power consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8230313B2Low-power predecoding based viterbi decoding
Publication Date: 2012.07.24 TEXAS INSTRUMENTS INC
  • US8230313B2 patent drawing
  • US8230313B2 patent drawing
  • US8230313B2 patent drawing

AI summary

In at least some disclosed embodiments, a system includes a Viterbi decoder and predecoding logic coupled to the Viterbi decoder. The predecoding logic decodes encoded data. The system further includes detection logic coupled to the predecoding logic. The detection logic tests decoded data, and the detection logic produces a binary result. The Viterbi decoder is enabled if the binary result is a first value, and the Viterbi decoder is disabled if the binary result is a second value.