Predicated Loop Branch Misprediction Flush Suppression
Solution Overview
Problem
Existing data processing systems face performance issues due to high misprediction rates for predicated-loop-terminating branch instructions, leading to unnecessary iterations and increased latency penalties, as they typically flush incorrectly fetched instructions from the pipeline upon detecting branch mispredictions.
Innovation Solution
The implementation of branch misprediction detection circuitry that determines a flush suppressing condition, allowing unnecessary iterations of the predicated loop body to remain in the pipeline and suppress their effects, thereby reducing latency penalties and improving performance by avoiding unnecessary flushing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If branch prediction circuitry predicts loop continuation for a predicated-loop-terminating branch instruction, then instruction fetching continues without interruption, but unnecessary iterations are processed following a mispredicted-non-termination branch misprediction
Solution Approach 1:
The patent converts the harmful effect of branch misprediction (processing unnecessary iterations) into a beneficial outcome by utilizing predication. Instead of flushing the pipeline upon detecting misprediction, the system allows unnecessary iterations to proceed while using predication bits to suppress their architectural effects. This transforms what would normally be a performance penalty into an opportunity to maintain pipeline throughput without compromising correctness.
Solution Approach 2:
The patent changes the state parameter of pipeline instructions by introducing predication bits that can suppress the architectural effects of unnecessary iterations. When a mispredicted-non-termination is detected, the system modifies the execution state of subsequent instructions by setting their predication bits to suppress mode, allowing them to proceed through the pipeline without producing incorrect architectural results. This parameter change enables the system to tolerate mispredictions without traditional pipeline flushing.
2Reliability
If the system flushes incorrectly fetched instructions upon detecting branch misprediction, then architectural correctness is maintained, but pipeline throughput decreases due to flushing operations
Solution Approach 1:
The patent converts the harmful effect of branch misprediction (processing unnecessary iterations) into a beneficial outcome by utilizing predication. Instead of flushing the pipeline upon detecting misprediction, the system allows unnecessary iterations to proceed while using predication bits to suppress their architectural effects. This transforms what would normally be a performance penalty into an opportunity to maintain pipeline throughput without compromising correctness.
Solution Approach 2:
The patent introduces predication bits as an intermediary mechanism between the branch prediction circuitry and the execution units. These predication bits act as a mediator that allows instructions to proceed through the pipeline while controlling their architectural effects. When a mispredicted-non-termination is detected, the predication bits suppress the effects of unnecessary iterations, enabling the system to maintain both throughput and correctness without traditional pipeline flushing.
3Loss of time
If branch misprediction detection circuitry suppresses flushing of unnecessary iterations, then latency penalty is reduced, but complexity of the detection and control logic increases
Solution Approach 1:
The patent makes the existing predication mechanism universal by extending its use beyond its traditional purpose to also handle branch misprediction recovery. The predication bits, originally designed for conditional execution, are now also used to suppress unnecessary iterations following mispredicted-non-termination. This multi-functional use of existing circuitry reduces the need for additional dedicated misprediction handling logic, thereby limiting the increase in overall system complexity.
Solution Approach 2:
The patent enables the predication mechanism to serve itself by having it handle both its original conditional execution function and the additional function of suppressing misprediction effects. The branch misprediction detection circuitry works in conjunction with the existing predication logic, allowing the predication mechanism to self-manage the suppression of unnecessary iterations without requiring a completely separate control system. This self-service approach minimizes the added complexity.
Data Source
AI summary
A predicated-loop-terminating branch instruction controls, based on whether a loop termination condition is satisfied, whether the processing circuitry should process a further iteration of a predicated loop body or process a following instruction. If at least one unnecessary iteration of the predicated loop body is processed following a mispredicted-non-termination branch misprediction when the loop termination condition is mispredicted as unsatisfied for a given iteration when it should have been satisfied, processing of the at least one unnecessary iteration of the predicated loop body is predicated to suppress an effect of the at least one unnecessary iteration. When the mispredicted-non-termination branch misprediction is detected for the given iteration of the predicated-loop-terminating branch instruction, in response to determining that a flush suppressing condition is satisfied, flushing of the at least one unnecessary iteration of the predicated loop body is suppressed as a response to the mispredicted-non-termination branch misprediction.