Predicted Register Affiliation for Branch Target Address Availability
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Solution Overview
Problem
In computing systems that use register-indirect branching, the expensive process of loading the special purpose counter register (CTR) for branch prediction can lead to performance limitations due to the need to store the branch address in another register before it is available, causing stalls during data access.
Innovation Solution
The proposed solution involves predicting the value of the target address for register-indirect branches and storing it in a predicted register, allowing it to be concurrently available for instruction fetch and storage, thereby eliminating the need for additional instructions to copy the value to the counter register, and enabling the use of an affiliated register for further processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the branch address is loaded into a general purpose register before being transferred to the special purpose counter register, then the counter register can be properly updated for branch prediction, but the called subroutine must stall during data access because the R12 value has not been loaded yet
Solution Approach 1:
The patent applies preliminary action by predicting the branch target address before the R12 register is actually loaded with the value. The branch predictor speculatively determines the target address in advance, allowing the processor to begin fetching instructions from the predicted target while the R12 load is still in progress. This eliminates the stall that would otherwise occur while waiting for R12 to be loaded.
2Loss of information
If the counter register value is read out, then the branch target address is available for use, but the process is expensive and limits performance
Solution Approach 1:
The patent performs preliminary action by having the branch predictor determine the target address speculatively before the counter register is actually read out. This allows the system to have the branch target address available earlier in the pipeline, improving performance by avoiding the expensive and time-consuming read-out operation when it could have been predicted in advance.
3Speed
If branch prediction is made before the R12 value is loaded, then instruction fetch can proceed without stalls, but the called subroutine experiences performance degradation due to data access stalls
Solution Approach 1:
The patent uses an intermediary approach by introducing a separate prediction mechanism that operates independently of the R12 register loading. The branch predictor acts as an intermediary that provides the target address through a different path, allowing instruction fetch to proceed without waiting for R12 to be loaded, while the actual R12 loading continues in the background without blocking the critical instruction fetch path.
Data Source
AI summary
A determination is made as to whether an instruction is an affiliation-creating instruction that provides an affiliation between a plurality of registers. Based on determining the instruction is an affiliation-creating instruction, an affiliation is specified. Further, a branch instruction is obtained. The branch instruction is separated from the instruction by one or more instructions. Based on the branch instruction and specifying the affiliation, processing is performed.