Predicting Physical Addresses in Non-Volatile Storage
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Solution Overview
Problem
Current non-volatile memory systems face inefficiencies in translating logical addresses to physical addresses, often requiring multiple memory accesses, which can lead to increased latency and power consumption due to the hierarchical organization of management tables.
Innovation Solution
Implementing a memory system that predicts physical addresses using pattern matching and machine learning techniques, such as hidden Markov models, to anticipate the physical location of data based on sequences of random logical addresses, thereby reducing the need for direct management table access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If hierarchical management table organization is used for logical to physical address translation, then address mapping capability is improved, but access latency increases due to multiple memory accesses
Solution Approach 1:
The system performs preliminary actions by predicting future physical addresses based on sequences of logical addresses before actual data access is needed. The prediction logic pre-calculates likely physical address locations using pattern recognition and machine learning, so when a read request arrives, the system can immediately access predicted addresses without performing full hierarchical table lookups, thereby reducing access latency while maintaining address mapping capability
Solution Approach 2:
The system implements dynamic address prediction that adapts to different access patterns. The prediction logic dynamically adjusts its behavior based on learned patterns from sequences of logical addresses, switching between different prediction strategies (sequential, random, or pattern-based) to optimize performance for the current access workload, thus reducing latency without sacrificing the adaptability of address mapping
2Adaptability or versatility
If hierarchical management table organization is used for logical to physical address translation, then address mapping capability is improved, but power consumption increases due to multiple memory accesses
Solution Approach 1:
The system performs preliminary address prediction computations that consume minimal power compared to full hierarchical table accesses. By predicting physical addresses in advance based on logical address patterns, the system avoids initiating power-intensive memory access operations to multiple levels of the management table, thereby reducing overall power consumption while preserving complete address mapping functionality
Solution Approach 2:
The system extracts only the essential address mapping information needed for predicted addresses rather than accessing complete hierarchical table structures. The prediction logic extracts patterns from logical address sequences and directly computes likely physical addresses, eliminating the need to read through intermediate management table levels, thus reducing power consumption while maintaining address mapping capability
3Measurement precision
If multiple memory accesses are performed for address translation, then address mapping accuracy is improved, but data retrieval speed decreases
Solution Approach 1:
The system performs preliminary predictions of physical addresses with high accuracy using machine learning models trained on address patterns. These predictions are made before actual data retrieval, so when read requests arrive, the system can directly access pre-predicted physical addresses without performing multiple sequential memory accesses, thereby maintaining address mapping accuracy while dramatically improving data retrieval speed
Solution Approach 2:
The prediction logic acts as an intermediary between logical addresses and physical address lookup. Instead of directly accessing multiple levels of the management table, the system uses the prediction logic as a mediator that translates logical addresses to predicted physical addresses in a single step, preserving the accuracy that would otherwise require multiple verification accesses while accelerating the overall retrieval process
Data Source
AI summary
Memory systems that can predict a physical address associated with a logical address, and methods for use therewith, are described herein. In one aspect, the memory system predicts a physical address for a logical address that follows a sequence of random logical addresses. The predicted physical address could be a physical location where the data for the logical address is predicted to be stored. In some cases, the host data can be returned without accessing a management table. The predicted physical address is not required to be the location of the data to be returned to the host for the logical address. In one aspect, the memory system predicts a physical address at which information is stored that may be used to ultimately provide the data for the logical address, such as a location in the management table.