Predictive Delta-Sigma AD Converter With Multi-Phase Integration

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Solution Overview

Problem

Conventional AD converters with first-order delta-sigma modulators face challenges in efficiently converting analog signals to digital signals due to limitations in integration and quantization processes, particularly in reducing noise and power consumption.

Innovation Solution

The AD converter divides the conversion period into multiple sub-periods, performing alternating integration and sampling operations using multiple analog and reference signal input circuits, and employs a predicting unit to generate a predictive integral signal for quantization, thereby relaxing the output change speed requirement and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the conversion period is divided into multiple sub-periods with alternating integration and sampling operations, then the signal-to-noise ratio is improved, but the device complexity increases

Engineering Contradiction:
Improvesignal-to-noise ratioVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The conversion period is divided into multiple sub-periods (first sub-period and second sub-period) where different operations are performed. During the first sub-period, integration operations are executed, while during the second sub-period, sampling operations are executed. This temporal segmentation allows multiple integrations to be performed within a single conversion cycle, improving the signal-to-noise ratio without requiring additional hardware components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic alternation between integration operations and sampling operations across different sub-periods. This periodic action pattern enables the system to perform multiple integrations sequentially while maintaining a regular operational rhythm, which improves measurement precision while keeping the device structure manageable.

Inventive Principle:
Principle #19Periodic action

2Manufacturing precision

If multiple integrations are performed within a single conversion period, then the accuracy of AD conversion is improved, but the output change speed requirement increases

Engineering Contradiction:
Improveaccuracy of AD conversionVSAvoidoutput change speed
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent performs preliminary integration operations during the first sub-period before the sampling operation in the second sub-period. By completing multiple integration steps in advance within the same conversion period, the system accumulates sufficient signal information before quantization, thereby improving accuracy without extending the overall conversion period or requiring faster output rates.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple analog signal input circuits are used for alternating integration and sampling, then the efficiency of AD conversion is improved, but the power consumption increases

Engineering Contradiction:
Improveefficiency of AD conversionVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic alternation between integration operations and sampling operations across different sub-periods. This periodic action pattern enables the system to perform multiple integrations sequentially while maintaining a regular operational rhythm, which improves measurement precision while keeping the device structure manageable.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11742872B2Ad converter
Publication Date: 2023.08.29 ASAHI KASEI MICRODEVICES CORP
  • US11742872B2 patent drawing
  • US11742872B2 patent drawing
  • US11742872B2 patent drawing

AI summary

Provided is an AD converter, including: an analog signal input circuit, configured to be input with an analog input signal, and output a first analog output signal based on the analog input signal and a second analog output signal based on the analog input signal at different timing; an integral circuit, configured to integrate the first analog output signal and the second analog output signal and output the first integral signal and the second integral signal; a predictive circuit, configured to predict an integral signal output after the output by the integral circuit based on the first integral signal and the second integral signal output by the integral circuit, and output a predictive integral signal; and a quantization circuit, configured to generate a digital signal with the predictive integral signal quantized.