Predictive Adder Ripple Bit Prediction Circuit
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Solution Overview
Problem
Conventional approaches for computing the sum of two N-bit numbers while adding or subtracting a 2k constant are slow due to serial signal propagation and require large, power-consuming adder hardware, limiting CPU speed in memory address calculations.
Innovation Solution
A predictive adder predicts the ripple effect of incrementing or decrementing the sum of two N-bit numbers by a one-bit constant, using consecutive ones or zeros predictors to generate results for A+B+2k and A+B−2k in parallel with the sum calculation, minimizing signal propagation delays and hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional approaches are used to calculate A+B, A+B+2k and A+B−2k, then the results can be obtained, but the computation is slow due to serial signal propagation
Solution Approach 1:
The patent applies preliminary action by predicting the ripple portion of bits before the actual addition is completed. The predictor circuit estimates which bits will be affected by the constant addition/subtraction based on the current sum state, allowing the final results to be computed faster by preparing the ripple information in advance.
2Power
If conventional approaches are used to calculate A+B, A+B+2k and A+B−2k, then the results can be obtained, but large adder hardware is required which consumes more power
Solution Approach 1:
The patent segments the adder hardware into two functional parts: a standard adder that computes A+B, and a separate predictor circuit that identifies ripple portions. This segmentation allows the system to avoid duplicating full adder hardware for each constant operation, reducing overall hardware size and power consumption while maintaining the ability to compute multiple results.
Solution Approach 2:
The predictor circuit serves multiple functions: it identifies ripple portions for both addition and subtraction operations, works with different constant values (2k), and supports multiple output calculations (A+B, A+B+2k, A+B−2k) using the same hardware structure, thereby reducing the need for separate dedicated circuits.
3Productivity
If conventional approaches are used to calculate A+B, A+B+2k and A+B−2k, then the results can be obtained, but the computation is slow due to serial production of results
Solution Approach 1:
The predictor circuit performs preliminary identification of ripple portions in parallel with the addition operation, rather than waiting for the addition to complete sequentially. This allows the system to prepare correction information in advance, enabling faster generation of multiple results (A+B, A+B+2k, A+B−2k) without serial processing delays.
Data Source
AI summary
A predictive adder produces the result of incrementing and/or decrementing a sum of A and B by a one-bit constant of the form of the form 2k, where k is a bit position at which the sum is to be incremented or decremented. The predictive adder predicts the ripple portion of bits in the potential sum of the first operand A and the second operand B that would be toggled by incrementing or decrementing the sum A+B by the one-bit constant to generate and indication of the ripple portion of bits in the potential sum. The predictive adder uses the indication of the ripple portion of bits in the potential sum and the carry output generated by evaluating A+B to produce the results of at least one of A+B+2k and A+B−2k.