Predictive Clock Frequency Control for Barrier-Synced Workloads
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Solution Overview
Problem
Selecting an optimum clock frequency for a processing unit is challenging due to interdependent factors like voltage, current, temperature, and power requirements, which can lead to power budget exceedance during computationally intensive phases, necessitating a proactive approach to modify clock frequency.
Innovation Solution
A predictive mechanism that monitors the number of barrier synchronizations of a predetermined type to determine when to adjust the clock frequency based on stored power usage requirements, allowing for proactive frequency modification before entering different execution periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the clock frequency is increased to improve processing speed, then productivity increases, but power consumption increases and may exceed the power budget
Solution Approach 1:
The clock frequency is made dynamic rather than static, allowing it to change based on the computational intensity of the current execution period. The system adjusts frequency in real-time to match workload demands, using barrier synchronisations as triggers to transition between different frequency states appropriate for different computational phases.
Solution Approach 2:
The system changes the clock frequency parameter in response to detected changes in computational requirements. By monitoring barrier synchronisations and determining the type of execution period, the system modifies the frequency parameter to optimize the balance between processing speed and power consumption for different workload characteristics.
2Use of energy by moving object
If the clock frequency is decreased to reduce power consumption, then power usage decreases, but processing speed decreases
Solution Approach 1:
The clock frequency is dynamically adjusted based on the computational intensity of the current execution period. During less computationally intensive phases, the frequency is reduced to save power, while during intensive phases, it is increased to maintain processing speed, optimizing the trade-off between power consumption and productivity.
Solution Approach 2:
The system modifies the clock frequency parameter in response to changes in workload characteristics. By detecting barrier synchronisations and determining execution period types, the system changes the frequency parameter to match the computational demands, reducing frequency when power efficiency is prioritized and increasing it when processing speed is needed.
3Reliability
If a reactive mechanism is used to detect power requirements and modify clock frequency, then the system responds to actual conditions, but there is a delay between power requirements changing and the mechanism detecting and responding to the change
Solution Approach 1:
The system performs preliminary classification of execution periods based on barrier synchronisation patterns before actual power-intensive operations begin. By pre-identifying the type of execution period through barrier detection, the system can proactively adjust clock frequency in advance, eliminating the delay associated with reactive detection of power requirements.
Solution Approach 2:
The system uses barrier synchronisations as feedback signals to determine the current execution period type and adjust clock frequency accordingly. This feedback mechanism allows the system to respond to structural characteristics of the workload rather than waiting for power consumption to actually increase, reducing response delay while maintaining accurate adaptation to computational demands.
Data Source
AI summary
A predictive clock controller is provided for modifying the frequency of a clock signal provided to a processing unit based on knowledge of the power usage by the application running on the processing unit during different execution periods. The predictive clock controller counts barrier syncs for the application, so as to determine where the application is in its sync schedule. The predictive clock controller is able to determine from the number of counted syncs, when the application will transition from one execution period to another execution period with different power requirements, and to adjust the clock frequency accordingly.