Predictive Audio Decoder Memory Resampling for Sampling-Rate Switching

The patent extracts only the necessary memory states (LPC synthesis filter states and adaptive codebook states) that need to be updated during sampling rate transition, rather than resampling the entire past decoded output buffer. By identifying and updating only these specific critical states at the new sampling rate, the system achieves seamless transition while significantly reducing computational complexity compared to full buffer resampling.

The patent segments the memory update process into distinct components: LPC synthesis filter state update and adaptive codebook state update. Each segment is handled separately with specific resampling techniques applied only to the relevant data portions. This segmentation allows efficient computation by focusing resources only on the essential state variables that affect decoding quality, rather than processing the entire decoded signal history.

The patent implements dynamics by making the sampling rate configurable and changeable during operation. The system maintains a single sampling rate within each frame for simplicity, but allows the sampling rate parameter itself to be dynamically updated between frames. The encoder and decoder both support multiple sampling rates (fs1 and fs2) and can seamlessly transition between them by updating the filter states, thus achieving both simplicity and flexibility.

The patent applies parameter changes by modifying the sampling rate parameter from fs1 to fs2 while maintaining system continuity. Instead of changing the fundamental system architecture, the patent changes the operating parameter (sampling rate) and adapts the filter states accordingly. The LPC synthesis filter coefficients and adaptive codebook states are re-computed at the new sampling rate, allowing the system to adapt to different sampling rates without structural modifications.