Predictive Timer Controller for SMPS Switching Loss Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing switched mode power supply (SMPS) technologies face inefficiencies due to fixed frequency approaches that fail to optimize switching losses, particularly when input and output voltages are near each other, leading to suboptimal performance in buck, boost, and buck-boost regions of operation.
Innovation Solution
A controller system comprising a loop controller, predictive timer, and gate driver that calculates and independently determines on-time (TON) and off-time (TOFF) for power transistors, allowing dynamic adjustment of TON and TOFF based on input and output voltages to optimize power converter performance across different operational regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If fixed frequency switching is used, then device complexity is reduced, but switching losses increase and efficiency deteriorates when input and output voltages are near each other
Solution Approach 1:
The patent implements dynamic switching frequency adjustment by using a predictive timer that independently determines TON and TOFF based on real-time voltage conditions. The controller transitions from fixed frequency to variable frequency operation, where the switching frequency adapts dynamically to match the power stage characteristics and optimize efficiency across different operational regions including buck, boost, and buck-boost modes.
Solution Approach 2:
The patent changes the timing parameters TON and TOFF dynamically based on input and output voltage relationships. The predictive timer calculates optimal duty cycles and switching frequencies by monitoring voltage conditions, allowing the system to adjust timing parameters in real-time to minimize switching losses while maintaining proper power conversion across different operating regions.
2Productivity
If dynamic adjustment of TON and TOFF is implemented, then efficiency is improved across different operational regions, but device complexity increases
Solution Approach 1:
The patent segments the power conversion operation into distinct phases by using separate predictive timers for TON and TOFF determination. The controller divides the switching cycle into controllable segments with independently optimized timing, allowing efficient management of buck, boost, and buck-boost regions through segmented control of power transistor switching intervals.
Solution Approach 2:
The patent implements feedback mechanisms where the predictive timer continuously monitors input and output voltages to determine optimal TON and TOFF values. The controller uses voltage feedback to adjust timing parameters dynamically, ensuring optimal efficiency across different operational regions while maintaining closed-loop control for stable power conversion.
3Loss of energy
If predictive timing is used to optimize switching, then switching losses are reduced, but measurement and control difficulty increases
Solution Approach 1:
The patent uses predictive timing where TON and TOFF are determined in advance based on expected voltage conditions and power stage characteristics. The predictive timer calculates optimal switching intervals before the actual switching event, allowing the controller to prepare and execute precise timing control that minimizes switching losses while simplifying real-time measurement requirements.
Data Source
AI summary
Aspects of the disclosure provide for a circuit. In an example, the circuit includes an input circuit having a first output and a second output, a first timer having a first input coupled to the first output of the input circuit, a second timer having a first input coupled to the second output of the input circuit, a second input coupled to an output of the first timer, and an output coupled to a second input of the first timer, and an output circuit coupled to the output of the first timer and the output of the second timer.