Pre-Driver Circuit With Dynamic Capacitance for Faster Switching
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Solution Overview
Problem
In electronic circuits, drivers often operate at higher voltage, current, and power ratings than other components, requiring a pre-driver to precisely control switching characteristics like rise-fall time and propagation delay, but existing solutions struggle to balance these performance characteristics effectively.
Innovation Solution
A driver circuit is designed with a series connection of PMOS and NMOS transistors, coupled with fully depleted silicon-on-insulator (FD-SOI) transistors and semiconductor switches, allowing for variable capacitance control to optimize rise-fall time and reduce propagation delay by altering capacitance during signal transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a pre-driver is used to precisely control switching characteristics, then rise-fall time control is improved, but propagation delay increases
Solution Approach 1:
The patent applies dynamics by making the capacitance value variable rather than fixed. The capacitance element's value changes dynamically during the switching cycle based on the state of the semiconductor switch, allowing the circuit to optimize both rise-fall time control and propagation delay through time-varying capacitance adjustment.
Solution Approach 2:
The patent changes the capacitance parameter dynamically during operation. By controlling the semiconductor switch to connect or disconnect the capacitance element, the circuit adjusts the effective capacitance value to achieve precise rise-fall time control during specific phases while minimizing propagation delay during switching transitions.
2Speed
If capacitance is increased to control rise-fall time, then rise-fall time increases, but propagation delay also increases
Solution Approach 1:
The patent applies periodic action by controlling the semiconductor switch to connect the capacitance element only during specific phases of the switching cycle (during rise-fall time control) while disconnecting it during other phases (during switching transitions). This periodic connection and disconnection allows the circuit to achieve controlled rise-fall time without permanently increasing propagation delay.
Solution Approach 2:
The circuit dynamically adjusts capacitance availability based on operational phase. The capacitance element is connected to provide rise-fall time control when needed and disconnected when would otherwise increase propagation delay, creating a dynamic, phase-dependent capacitance control strategy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases rise-fall time while decreasing propagation delay, effectively managing parasitic behaviors in high-frequency switching by dynamically controlling capacitance, thus enhancing the performance of pre-driver circuits in electronic systems.
Implementation Method 1
A first fully depleted silicon-on-insulator (FD-SOI) transistor includes a gate, source, and drain, where the source and drain are coupled to a first reference terminal
Data Source
AI summary
A drive circuit includes an input, a driver, a first buffer, a second buffer, a first capacitance element, and a second capacitance element. The driver includes a first PMOS transistor and a first NMOS transistor coupled in series between a supply terminal and a reference terminal. The first buffer is coupled between the input and a control terminal of the first PMOS transistor. The second buffer is coupled between the input and a control terminal of the first NMOS transistor. The first capacitance element is coupled to the control terminal of the first PMOS transistor through a first semiconductor switch. The second capacitance element is coupled to the control terminal of the first NMOS transistor through a second semiconductor switch.