Output Driver Slew Rate Calibration Across PVT Variations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Variations in fabrication processes, supply voltage, and operation temperature (PVT) cause slew rate deviations in semiconductor devices, leading to performance issues and increased manufacturing costs due to the need for additional production to account for unusable devices.
Innovation Solution
A slew rate control circuit that monitors PVT variations and adjusts the drive strength of pre-drivers using a voltage regulation circuit and calibrator, ensuring consistent output signal integrity by compensating for changes in process, voltage, and temperature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If process variations and operating condition changes occur, then device performance varies, but manufacturing precision and reliability deteriorate
Solution Approach 1:
The patent changes the electrical parameters of the pre-driver circuit by dynamically adjusting the drive strength through controlled current sources. The circuit monitors operating conditions and modifies transistor gate voltages to maintain consistent slew rate despite PVT variations, directly addressing the manufacturing precision and reliability contradiction
Solution Approach 2:
The patent implements a feedback mechanism where the circuit monitors its own output slew rate and adjusts the pre-driver strength accordingly. By measuring the actual slew rate and comparing it to the target value, the control circuit modifies drive strength to compensate for variations, ensuring consistent performance across different operating conditions
2Productivity
If additional production is implemented to account for unusable devices, then productivity increases, but manufacturing cost increases
Solution Approach 1:
The patent enables the circuit to self-adjust and compensate for its own variations through integrated control circuitry. By monitoring its own performance and automatically correcting deviations, the circuit eliminates the need for post-manufacturing selection or additional production runs, improving effective yield without increasing manufacturing complexity or cost
3Adaptability or versatility
If different device geometries are used to meet performance specifications, then adaptability improves, but device complexity increases
Solution Approach 1:
The patent transitions from static device geometries to dynamic parameter adjustment. Instead of manufacturing different fixed geometries for different performance requirements, the circuit dynamically adjusts its electrical characteristics through controllable current sources and voltage regulation, maintaining adaptability while reducing manufacturing complexity
Solution Approach 2:
The patent creates a universal pre-driver design that can adapt to multiple performance requirements through electrical adjustment rather than geometric variation. The same physical circuit structure can be tuned to meet different slew rate specifications by modifying control parameters, eliminating the need for multiple specialized geometries
Data Source
AI summary
This document discusses, among other things, output slew rate control. Methods and structures are described to provide slew rate control of an output driver circuit such as a DRAM output driver on a die. A selectable combination of series coupled transistors are configured as a parallel array of complementary inverter pairs to provide a divided voltage to a calibrator. The calibrator is configured to respond to a differential voltage to adjust the divided voltage such that the differential voltage is forced to zero. The calibrator outputs a plurality of discrete signals from an up/down counter to switch on and off the individual transistors of the parallel array to increase and decrease a collective current. In some embodiments, transistor channel currents are modulated to step-adjust a voltage based on a ratio associated with a static resistance. In various embodiments, the divided voltage is an analog voltage based on a resistance associated with trim circuitry.


