Preemphasis Driver Circuit Using Unclocked Delay Elements

The patent replaces clocked delay elements (which require clock signal distribution infrastructure) with unclocked delay elements implemented as simple RC circuits or inverter chains. This substitution eliminates the need for clock trees and synchronization logic, thereby reducing device complexity and layout irregularities while maintaining the preemphasis function through passive or simple active delay mechanisms.

The patent employs simple, inexpensive delay elements such as RC circuits or basic inverter chains instead of complex clocked flip-flops. These unclocked delay elements are easier to manufacture, require fewer resources, and can be laid out more regularly, thus reducing overall device complexity while achieving the required delay functionality for preemphasis.

The patent implements a self-calibrating preemphasis circuit where the unclocked delay elements automatically adjust their delay characteristics based on the input signal transitions. The circuit inherently matches the delay between the main driver and auxiliary driver without requiring external calibration procedures or synchronization logic, thereby simplifying operation while maintaining impedance matching for optimal signal transmission.

The patent extracts the synchronization and calibration functions from the overall system by using unclocked delay elements that inherently provide the required delay without needing clock synchronization. This extraction eliminates the complex synchronization and calibration mechanisms typically required for impedance matched push-pull drivers, thereby improving ease of operation.