Preemptive Wakeup Circuit for Low Power Mode Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Electronic devices face latency and power consumption issues when waking up sub-systems and resources from low power modes for real-time tasks, as existing methods require complex software sequences and multiple clock channels, increasing costs and power usage.
Innovation Solution
An electronic circuit with a processing sub-system, power controller, and real-time clock (RTC) sub-system that includes an alarm register for early warning countdowns, a preemptive wakeup circuit to generate clock requests, and a power controller to wake components, allowing for efficient and cost-effective preemptive wakeup of processing sub-systems from low power modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If preemptive wakeup is handled in software, then the sub-system can be woken up from low power mode, but complex software sequences are required to manage hardware resource states, increasing power consumption in wakeup sequences
Solution Approach 1:
An intermediary preemptive wakeup circuit is introduced between the RTC sub-system and the processing sub-system. This circuit receives the early warning countdown from the RTC and autonomously generates clock request signals to wake up the processing sub-system and its resources in advance, eliminating the need for complex software wakeup sequences and reducing power consumption during wakeup transitions.
Solution Approach 2:
The system performs preliminary action by waking up the processing sub-system and its hardware resources in advance of the actual scheduled task execution time. The RTC sub-system provides an early warning countdown that triggers the preemptive wakeup circuit to activate resources before they are needed, ensuring they are ready when the task executes while minimizing the duration resources remain active.
2Measurement precision
If two system real-time clock channels are implemented for each event, then precise wakeup can be achieved, but the number of channels needed for multiple processing unit sub-systems increases operating and component cost
Solution Approach 1:
The RTC sub-system is designed with multi-functionality to serve multiple processing unit sub-systems simultaneously. Instead of dedicating two separate clock channels to each processing unit, the single RTC sub-system provides early warning countdown signals to multiple preemptive wakeup circuits, each tailored to its associated processing unit's specific wakeup requirements. This universal approach maintains precise wakeup capability while significantly reducing the total number of clock channels needed.
Solution Approach 2:
Multiple wakeup management functions are merged into a single RTC sub-system. The RTC provides early warning countdown capability that can be shared across multiple processing units, combining what would otherwise require separate dedicated clock channels into one consolidated timekeeping resource, thereby reducing system complexity and cost.
Data Source
AI summary
A circuit comprises a power controller, a real-time clock (RTC) sub-system, and a processing sub-system. The RTC sub-system includes an alarm register storing a predetermined time for a task, and provides an early warning countdown and a scheduled event signal. The processing sub-system includes a processor, a preemptive wakeup circuit, and a component coupled to the processor and configured to execute the task with the processor. The preemptive wakeup circuit comprises a selector logic circuit, a comparator, and a wakeup initiation circuit. The selector logic circuit receives latency values indicative of wakeup times for a clock generator and the component, and outputs a longest wakeup time to the comparator, which indicates when the early warning countdown and the longest wakeup time are equal. The wakeup initiation circuit generates a clock request and disables the sleep mode indicator. The power controller provides a clock signal and wakes the component.