Prefetch Buffer Address Translation for Mobile SoC Latency
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Solution Overview
Problem
In mobile devices, the latency associated with address translation overhead in virtual memory management systems is significant, particularly when page descriptors are not present in the memory management unit, leading to increased memory access operations and reduced system performance.
Innovation Solution
A memory management unit with an address translation unit, a translation lookaside buffer, and a prefetch buffer that determines the presence of page descriptors and performs prefetch operations based on access direction information to minimize latency by updating the translation lookaside buffer and performing translations using page descriptors from the prefetch buffer or memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a translation lookaside buffer is used to store page descriptors, then address translation speed is improved, but the buffer size is limited and page descriptors may not be present
Solution Approach 1:
The system performs preliminary prefetching of page descriptors from memory to the translation lookaside buffer before they are actually needed for address translation. The address translation unit monitors access patterns and initiates prefetch operations for page descriptors that are likely to be needed soon, ensuring they are available in the buffer when required, thus eliminating the need to access external memory during translation operations.
2Reliability
If page descriptors are fetched from memory when not present in the translation lookaside buffer, then complete address translation is achieved, but memory access operations increase and latency increases
Solution Approach 1:
The address translation unit performs preliminary actions by detecting when the translation lookaside buffer does not contain a required page descriptor and automatically initiating a prefetch operation to retrieve it from external memory before the actual address translation is needed. This proactive approach ensures that when translation is required, the page descriptor is already available in the buffer, eliminating the time penalty of external memory access during critical translation operations.
3Productivity
If the translation lookaside buffer is updated with prefetched page descriptors, then future address translations are accelerated, but buffer management complexity increases
Solution Approach 1:
The address translation unit autonomously manages the translation lookaside buffer by automatically detecting missing page descriptors, initiating prefetch operations, and updating the buffer with retrieved descriptors. The system monitors its own buffer contents and access patterns, making decisions about when and what to prefetch without external intervention. This self-service approach simplifies the overall system architecture by eliminating the need for separate buffer management hardware or software while maintaining high translation throughput.
Data Source
AI summary
A page descriptor can be stored in advance in a memory management unit under various conditions so that an address translation overhead can be reduced. The memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer (TLB) stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor corresponding to a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses. The address translation unit, in the event the page descriptor corresponding to the received virtual address is not present in the translation lookaside buffer, further determines whether the page descriptor corresponding to the received virtual address is present in the prefetch buffer; updates the translation lookaside buffer with the page descriptor corresponding to the received virtual address; and performs a translation of the virtual address to a physical address using the page descriptor corresponding to the received virtual address. The prefetch buffer may include sub-prefetch buffers, and may be updated based on access direction information.