Prefetch Request Priority Management for Transactional Memory

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Transactional memory systems face performance degradation due to prefetch instructions causing transactions to abort due to address conflicts, particularly when prefetch requests from remote processors have higher priority than ongoing transactions.

Innovation Solution

Implement a method to evaluate prefetch requests for potential conflicts with transactions by comparing priorities and delaying or quiescing prefetch requests to avoid aborting transactions, using a prefetch protocol that manages read and write operations to prevent transaction failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If prefetch requests are executed with high priority to improve data retrieval speed, then cache access efficiency is improved, but transaction aborts increase due to address conflicts

Engineering Contradiction:
Improvecache access speedVSAvoidtransaction completion rate
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by evaluating prefetch requests before they are executed. The system performs a conflict detection check in advance to determine whether a prefetch request would cause a transaction abort, and only allows the prefetch to proceed if no conflict is predicted. This prevents the harmful effect before it occurs, resolving the contradiction between fast prefetch execution and transaction reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If prefetch requests are delayed or quiesced to prevent transaction aborts, then transaction reliability is improved, but cache access efficiency decreases

Engineering Contradiction:
Improvetransaction completion rateVSAvoidcache access speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements feedback by continuously monitoring the state of in-flight transactions and using this information to make dynamic decisions about prefetch request handling. The conflict detection mechanism provides feedback about potential address conflicts, and the system adjusts prefetch execution accordingly - allowing prefetches when safe and delaying/quiescing them when conflicts are predicted. This feedback loop resolves the contradiction by optimizing both reliability and speed based on real-time system state.

Inventive Principle:
Principle #23Feedback

3Device complexity

If prefetch requests are allowed to execute without conflict detection, then system complexity is reduced, but transaction aborts increase

Engineering Contradiction:
Improveprefetch management complexityVSAvoidtransaction completion rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces an intermediary conflict detection mechanism that sits between the prefetch request generator and the cache execution unit. This intermediary evaluates potential address conflicts by comparing prefetch addresses against active transaction addresses, and mediates the execution decision. While this adds some complexity, it provides a structured and manageable approach to preventing transaction aborts, resolving the contradiction between simplicity and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10372611B2Deferred response to a prefetch request
Publication Date: 2019.08.06 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10372611B2 patent drawing
  • US10372611B2 patent drawing
  • US10372611B2 patent drawing

AI summary

Modifying prefetch request processing. A prefetch request is received by a local computer from a remote computer. The local computer responds to a determination that execution of the prefetch request is predicted to cause an address conflict during an execution of a transaction of the local processor by comparing a priority of the prefetch request with a priority of the transaction. Based on a result of the comparison, the local computer modifies program instructions that govern execution of the program instructions included in the prefetch request to include program instruction to perform one or both of: (i) a quiesce of the prefetch request prior to execution of the prefetch request, and (ii) a delay in execution of the prefetch request for a predetermined delay period.