Prefetch Tagged Sequential Read Operations in Storage Arrays
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Solution Overview
Problem
Existing storage array systems struggle to efficiently detect sequential read patterns, leading to impaired recognition and increased response times due to the overhead of multi-path software and load balancing techniques, especially in enterprise storage environments where multiple array ports complicate pattern identification.
Innovation Solution
Implementing a method to tag sequential read operations with prefetch tags, such as '11' for massive sequential reads, allowing storage controllers to pre-fetch data accordingly and optimize cache configuration, thereby enhancing the storage array's ability to recognize and handle sequential I/O patterns efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-path software and load balancing techniques are implemented to increase I/O speed, then write I/O and random read I/O success rates improve, but sequential read I/O detection capability deteriorates due to overhead
Solution Approach 1:
The host computer performs preliminary analysis of I/O patterns and tags sequential read operations before submitting them to the storage array. This preliminary action allows the storage array to receive already-identified sequential read requests, eliminating the need for the array to perform complex pattern detection amidst multi-path overhead.
Solution Approach 2:
The host computer acts as an intermediary that analyzes I/O patterns and adds tags to sequential read operations. This intermediary function separates the pattern detection task from the storage array, allowing the array to focus on efficient data delivery without the overhead of multi-path software interference.
2Adaptability or versatility
If multiple array ports are used to provide access to storage capacity, then storage accessibility improves, but sequential read pattern recognition deteriorates
Solution Approach 1:
The host computer performs preliminary tagging of sequential read operations before they are distributed across multiple array ports. This ensures that even when I/O requests are scattered across multiple paths and ports, each sequential read request carries identification information that allows the storage array to recognize and optimize for sequential access patterns regardless of the path taken.
3Reliability
If the storage array attempts to identify sequential patterns under multi-path overhead, then pattern recognition capability is maintained, but response time increases and processor utilization rises
Solution Approach 1:
The pattern recognition function is extracted from the storage array and relocated to the host computer. The host analyzes I/O patterns and tags sequential read operations, then submits these tagged requests to the storage array. This extraction eliminates the overhead of pattern detection at the array level, reducing response time and processor utilization while maintaining reliable pattern recognition through the host's analysis.
4Productivity
If pre-fetching is attempted without accurate sequential pattern detection, then cache utilization may improve, but response time increases due to failed pre-fetching cycles
Solution Approach 1:
The host computer performs preliminary identification and tagging of sequential read operations, ensuring that only genuinely sequential requests are submitted to the storage array. This preliminary action enables the storage array to confidently execute pre-fetching operations for tagged sequential reads, improving cache utilization with accurate pre-fetching while avoiding wasted pre-fetching cycles on non-sequential requests.
Data Source
AI summary
In some embodiments, a storage device, comprises a processor, a memory module communicatively connected to the processor, and logic instructions in the memory module which, when executed by the processor, configure the processor to receive a read input/output operation, and configure a prefetch disk data into cache memory in response to a prefetch tag embedded in the read input/output operation.