Prefetch Tracks Using Multiple Caches for Sequential Storage

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Solution Overview

Problem

Current cache management systems in storage devices face challenges in optimizing both temporal and spatial locality, leading to inefficiencies in read and write latency, particularly in sequential access storage systems.

Innovation Solution

A computer program product and method that involves prefetching tracks from a sequential access storage medium and caching them in a non-volatile storage device, which is integrated with a sequential access storage device, allowing for prioritization of read requests and efficient management of cache space to minimize latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If tracks are cached in a single cache memory, then read latency is reduced, but cache space is limited and cannot accommodate both frequently accessed and prefetch tracks efficiently

Engineering Contradiction:
Improveread latencyVSAvoidcache space limitation
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent divides the cache into two separate cache memories: a first cache memory for storing frequently accessed tracks and a second cache memory for storing prefetch tracks. This segmentation allows each cache to be optimized for its specific purpose, enabling the system to reduce read latency for both cache hit and prefetch scenarios without the space constraints of a single unified cache.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hierarchical cache structure with two levels (first cache and second cache), adding a dimensional layer to the cache architecture. This hierarchical arrangement allows tracks to be staged through multiple levels before reaching the final destination, enabling parallel prefetching operations while maintaining fast access to frequently used tracks in the first cache.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If prefetch requests are processed at high priority, then prefetch tracks are cached quickly, but regular read requests experience increased latency

Engineering Contradiction:
Improveprefetch speedVSAvoidread request latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary prefetching actions by identifying and caching tracks before they are actually requested. The system proactively loads tracks into the second cache memory in advance, so when a read request arrives, the data is already available or can be quickly retrieved, eliminating the need to wait for the actual read operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a prefetch cache (second cache memory) as an intermediary layer between the storage device and the main cache system. This intermediary prefetch cache handles prefetch requests separately, allowing regular read requests to be processed at normal priority while prefetch tracks are staged in advance without blocking critical read operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If LRU cache technique is used to optimize temporal locality, then frequently accessed tracks remain in cache, but spatial locality is not exploited and destage operations increase

Engineering Contradiction:
Improvecache hit efficiencyVSAvoiddestage operation frequency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent segments the cache system into two distinct caches with different optimization goals: the first cache memory is optimized for temporal locality using LRU techniques to keep frequently accessed tracks, while the second cache memory is optimized for spatial locality to store prefetch tracks that are physically close together, reducing unnecessary destage operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different cache management strategies to different parts of the system: the first cache uses LRU replacement policy optimized for temporal locality, while the second cache uses spatial locality optimization for prefetch tracks. This local quality approach allows each cache segment to be tuned for its specific access pattern, improving overall efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8762650B2Prefetching tracks using multiple caches
Publication Date: 2014.06.24 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8762650B2 patent drawing
  • US8762650B2 patent drawing
  • US8762650B2 patent drawing

AI summary

Provided are a computer program product, sequential access storage device, and method for managing data in a sequential access storage device receiving read requests and write requests from a system with respect to tracks stored in a sequential access storage medium. A prefetch request indicates prefetch tracks in the sequential access storage medium to read from the sequential access storage medium. The accessed prefetch tracks are cached in a non-volatile storage device integrated with the sequential access storage device, wherein the non-volatile storage device is a faster access device than the sequential access storage medium. A read request is received for the prefetch tracks following the caching of the prefetch tracks, wherein the prefetch request is designated to be processed at a lower priority than the read request with respect to the sequential access storage medium. The prefetch tracks are returned from the non-volatile storage device to the read request.