Pre-formed Chip Capacitor Precursors for Embedded PCB Integration
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Solution Overview
Problem
Conventional embedded stack-up structure capacitors require numerous processing steps and a low dielectric constant substrate, necessitating a wide metal area for reasonable capacitance, which is inefficient and complex.
Innovation Solution
The use of pre-formed chip capacitor precursors with high k dielectric layers or low k dielectric materials, which lack initial electrical connections, are dropped onto a PCB substrate and connected via drilling and filling vias with conductive material, simplifying the assembly process and reducing the necessary area for achieving desired capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional embedded stack up structure capacitors are used, then capacitors can be integrated into PCB substrates, but the process requires a large number of processing steps including multiple interconnect steps and via connections
Solution Approach 1:
The capacitor is divided into separate precursor layers that are manufactured independently and then assembled together. The precursor structure includes multiple metal layers and dielectric layers that are prepared separately before being combined, reducing the complexity of the overall manufacturing process by breaking down the complex embedded capacitor fabrication into manageable segments.
Solution Approach 2:
The capacitor precursor structure is prepared in advance with all metal layers and dielectric layers formed before final assembly. The precursors are manufactured with pre-formed patterns and structures, and then subsequently assembled onto the PCB substrate, eliminating the need for complex in-situ fabrication steps during PCB manufacturing.
2Manufacturing precision
If conventional embedded stack up structure capacitors are used, then capacitors can be integrated into PCB substrates, but the dielectric substrate material has a relatively low dielectric constant requiring a wide metal area to achieve reasonable capacitance values
Solution Approach 1:
The dielectric constant parameter is changed by selecting materials with higher k values for the dielectric layers in the capacitor precursor structure. By using high-k dielectric materials instead of conventional low-k PCB substrate materials, the capacitance density is increased, allowing reasonable capacitance values to be achieved with smaller metal areas.
3Area of stationary object
If pre-formed capacitor precursors with high k dielectric layers are used, then higher capacitance can be achieved with smaller area, but the precursors lack initial electrical connections requiring drilling and filling vias
Solution Approach 1:
The capacitor precursor structure is prepared in advance with all metal layers and dielectric layers formed, but without through-via connections. The precursors are manufactured with pre-formed patterns and structures, then subsequently assembled onto the PCB substrate and connected via standard PCB drilling and filling operations, separating the fabrication and assembly processes.
Solution Approach 2:
The capacitor structure is segmented into a precursor portion containing the metal and dielectric layers, and a connection portion formed by subsequent via drilling and filling. This segmentation allows the precursor to be optimized for capacitance without initial connection requirements, while the connection steps are added as separate, standardized PCB processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces the number of processing steps, allows for higher capacitance with smaller area requirements, and provides high dielectric strength, enhancing the efficiency and functionality of capacitors in packaged semiconductors.
Implementation Method 1
The dielectric layers can be high k dielectric layers which helps limit the necessary area to realize a desired capacitance value
Implementation Method 2
The filled vias also serve the purpose of electrically connecting the capacitor plates to electrically conductive contact regions on the substrate material
Data Source
AI summary
A plurality of electrically conductive material layers and a plurality of dielectric layers are alternately stacked on a second substrate. The plurality of electrically conductive material layers comprise first and second patterns. The first pattern comprises at least a first pair of overlaying areas free of the electrically conductive material, and the second pattern comprises at least a second pair of overlaying areas free of the electrically conductive material. The first pair of areas overlay areas of the second pattern having the electrically conductive material and the second pair of areas overlay areas of the first pattern having the electrically conductive material. The plurality of electrically conductive material layers are electrically isolated from one another by the dielectric layers.