Pre-Molded Leadframe Structure for Dense Semiconductor Interconnects
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Solution Overview
Problem
Semiconductor packages face challenges with increased power and current densities due to reduced interconnect bump sizes, leading to higher temperatures and premature failures, and require thicker leadframes, which increase spacing and reduce available surface area for connections.
Innovation Solution
The method involves forming a leadframe with a pre-mold compound in the spacing between leadframe leads to provide structural support, allowing for smaller leadframe thickness and increased surface area for interconnect bumps, and using a tapered shape for the bumps to increase the contact area on the leadframe while maintaining a smaller size on the semiconductor die.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If interconnect bump sizes are reduced to increase density, then the number of interconnects increases, but current and power densities increase leading to higher temperatures and premature failures
Solution Approach 1:
The patent applies local quality by creating a tapered interconnect bump structure where the cross-sectional area varies along its length. The bump has a larger contact area at the leadframe interface and a smaller contact area at the die interface, optimizing heat dissipation and current distribution locally at each interface rather than using a uniform structure throughout.
Solution Approach 2:
The patent changes the geometric parameters of the interconnect bump by using a tapered shape instead of a cylindrical or spherical form. This parameter change allows the cross-sectional area to vary continuously from the base to the top, enabling different effective contact areas at different interfaces while maintaining a single continuous structure.
2Strength
If leadframe thickness is increased to handle higher power densities, then structural support improves, but spacing between leads increases reducing available surface area for connections
Solution Approach 1:
The patent applies local quality by providing structural support selectively at the leadframe level rather than uniformly throughout the entire interconnect structure. The leadframe is designed with enhanced thickness or reinforcement at specific locations to provide localized structural support, allowing the upper portions of the interconnects to maintain smaller cross-sections for reduced spacing.
Solution Approach 2:
The patent resolves the contradiction by transitioning from a two-dimensional planar constraint to a three-dimensional solution. By using tapered vertical structures that vary in cross-sectional area along their height, the design achieves both structural strength at the base and reduced spacing at the top, effectively utilizing the vertical dimension to resolve the area-thickness tradeoff.
Data Source
AI summary
In one instance, a semiconductor package includes a metal leadframe having a first plurality of openings extending partially into the leadframe from the first side and a second plurality of openings extending partially into the leadframe from the second side together forming a plurality of leads. A pre-mold compound is positioned in the second plurality of openings that at least partially supports the plurality of leads. The semiconductor package has a plurality of bumps extending from the landing sites to a semiconductor die and a molding compounding at least partially covering the plurality of bumps and the metal leadframe. Other packages and methods are disclosed.