Pre-offset platform for 3D NAND memory tier expansion

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Solution Overview

Problem

Tier expansion during the formation of memory pillars in 3D NAND memory structures leads to surface irregularities, which can cause pillar misalignment and top plug formation failures, and existing solutions are costly and inefficient.

Innovation Solution

The implementation of a pre-offset platform between the substrate and the staircase area of the memory block, which offsets the tier expansion height, ensuring that the upper surfaces of the staircase and memory array areas are in the same plane, thereby reducing surface irregularities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photoresist and wet etch are used to remove film residual at low surface areas, then surface flatness is improved, but manufacturing complexity and cost increase

Engineering Contradiction:

Improvesurface flatnessVSAvoidmanufacturing process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the pre-offset platform before the tier expansion occurs during memory pillar formation. This advance preparation compensates for the expected expansion, eliminating the need for subsequent corrective steps like photoresist masking and wet etching to remove film residuals.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention extracts and removes the problematic tier expansion effect by introducing a compensating pre-offset platform. This separates the expansion issue from the final surface topology, allowing the memory pillars to expand without creating surface irregularities that would require additional processing steps.

Inventive Principle:

Principle #2Taking out (Extraction)

2Manufacturing precision

If additional CMP operations are performed to make surface flat, then surface flatness is improved, but manufacturing time and cost increase

Engineering Contradiction:

Improvesurface flatnessVSAvoidmanufacturing cycle time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The pre-offset platform is formed in advance before memory pillar formation, preemptively compensating for tier expansion. This eliminates the need for additional CMP operations after pillar formation, reducing manufacturing cycle time while maintaining surface flatness.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The invention converts the potentially harmful tier expansion effect into a beneficial outcome by using the expected expansion amount to define the pre-offset platform height. The expansion that would normally create surface irregularities is instead used to achieve the desired final surface flatness without additional processing.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Ease of manufacture

If tier expansion is allowed to occur naturally, then manufacturing process is simpler, but surface irregularities cause pillar misalignment and top plug formation failures

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidpillar alignment accuracy

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The pre-offset platform applies preliminary anti-action by compensating for the expected tier expansion before it occurs. The platform height is specifically designed to offset the expansion amount, preventing surface irregularities that would lead to pillar misalignment and top plug formation failures while maintaining process simplicity.

Inventive Principle:

Principle #9Preliminary anti-action

4Reliability

If pre-offset platform is formed to compensate tier expansion, then surface flatness and reliability are improved, but additional manufacturing steps are required

Engineering Contradiction:

Improvepillar alignment accuracyVSAvoidmanufacturing process steps

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The invention merges the pre-offset platform formation with the existing memory block formation process. The platform is formed as an integrated part of the memory structure fabrication, combining multiple functions into a single manufacturing sequence rather than adding separate corrective steps later.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12207461B2Tier expansion offset

Publication Date: 2025.01.21 INTEL NDTM US LLC

AI summary

Systems, apparatuses, and methods may provide for technology for forming a pre-offset platform on top of a substrate. A memory block is formed, where the memory block includes a staircase area and a memory array area located adjacent the staircase area. The memory array area includes a plurality of memory pillars extending into the memory block. The staircase area has a first height, the memory array area has a second height, and a tier expansion height is defined as a difference between the second height and the first height. The pre-offset platform is located between the substrate and the staircase area of the memory block. The pre-offset platform is oriented and arranged to offset the tier expansion height so that an upper surface of the staircase area and an upper surface of the memory array area are located in a same plane.