Prepreg Substrate Thermal Expansion Matching for Semiconductor Warpage
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Solution Overview
Problem
Existing semiconductor packages face warpage issues due to mismatched thermal expansion coefficients between the chip and the substrate, leading to stress and reliability concerns during temperature variations.
Innovation Solution
A prepreg with a semi-cured resin composition, including a thermosetting resin and inorganic fillers, is used to create a substrate with a controlled thermal expansion coefficient, ensuring the substrate's expansion and contraction match the chip's, thereby reducing warpage and stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the modulus of elasticity of the substrate is increased to withstand thermal stress, then the substrate can better withstand thermal stress, but significant stress is caused to the chip
Solution Approach 1:
The patent changes the material parameters of the substrate by incorporating specific fillers (such as alumina, silica, or boron nitride) and adjusting the resin composition ratio to achieve an optimized balance between modulus of elasticity and thermal expansion coefficient. This allows the substrate to have sufficient stiffness to withstand thermal stress while maintaining a thermal expansion coefficient that closely matches the chip, thereby reducing stress on the chip.
Solution Approach 2:
The patent uses composite materials consisting of a thermosetting resin matrix combined with inorganic fillers (such as alumina, silica, or boron nitride) to create a substrate that simultaneously achieves the desired mechanical strength and thermal expansion properties. The composite structure allows independent optimization of stiffness and thermal expansion characteristics, resolving the contradiction between substrate strength and chip stress.
2Stability of the object's composition
If the coefficient of thermal expansion of the substrate is decreased to match the chip, then the difference in CTE between substrate and chip is reduced, but the substrate may not withstand thermal stress
Solution Approach 1:
The patent employs composite materials with a thermosetting resin matrix and inorganic fillers to simultaneously achieve a low coefficient of thermal expansion (close to that of the chip) and high modulus of elasticity. The inorganic fillers contribute to thermal expansion control while the resin matrix provides the necessary mechanical strength and stiffness to withstand thermal stress.
Solution Approach 2:
The patent optimizes the composition parameters by adjusting the type, amount, and size distribution of fillers, as well as the resin matrix composition, to achieve the dual objective of matching the chip's thermal expansion coefficient while maintaining sufficient structural strength to handle thermal stress during operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces warpage and stress on the semiconductor package, ensuring reliable electrical and physical connections, and allows for a thinner substrate design without compromising reliability.
Implementation Method 1
a semi-cured product of a resin composition (12) impregnated into the base member (11). The resin composition (12) includes: a thermosetting resin
Implementation Method 2
X1 is a coefficient of thermal expansion of the first chip surface of the chip before the chip is mounted on the substrate, and X2 is a coefficient of thermal expansion of the first chip surface of the chip after the chip has been mounted on the substrate
Data Source
AI summary
A prepreg is used to fabricate a semiconductor package including a chip and a substrate to mount the chip thereon. The prepreg is in a semi-cured state. The substrate includes a cured product of the prepreg. The chip has: a first chip surface located opposite from the substrate; and a second chip surface located opposite from the first chip surface. The prepreg satisfies the relational expression: 0.9≤X2/X1≤1.0 (I), where X1 is a coefficient of thermal expansion of the first chip surface of the chip before the chip is mounted on the substrate, and X2 is a coefficient of thermal expansion of the first chip surface of the chip after the chip has been mounted on the substrate.