Per-Row Hammer Tracking Logic for DRAM Row Hammer Mitigation
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Solution Overview
Problem
Dynamic Random Access Memory (DRAM) systems face reliability issues due to row hammering, where frequent access to a specific wordline can cause data loss in adjacent memory cells, leading to potential malicious attacks or reliability concerns, especially in miniaturized DRAMs.
Innovation Solution
A memory device with a per-row hammer tracking (PRHT) logic circuit that manages active counts for each row, adjusts thresholds based on cell strength, and performs row hammer mitigation operations by identifying and refreshing adjacent rows with weak cell strength more frequently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If frequent access to a specific wordline is performed, then memory access speed is improved, but data loss in adjacent memory cells occurs due to row hammering
Solution Approach 1:
The patent performs preliminary detection of row hammering by monitoring the number of activations of each wordline through PRHT memory cells before data loss occurs. When a threshold is reached, the system proactively performs a refresh operation on adjacent victim rows, preventing data loss before it happens rather than reacting after damage occurs.
Solution Approach 2:
The patent implements a feedback mechanism where the activation count of each wordline is continuously monitored and fed back to the control logic. Based on this feedback, the system dynamically determines which adjacent rows need refresh operations, creating a closed-loop control system that adapts to actual access patterns and prevents row hammering effects.
2Reliability
If refresh operations are performed on all rows, then data loss due to row hammering is prevented, but memory performance and access speed deteriorate
Solution Approach 1:
The patent applies refresh operations locally only to specific victim rows that are adjacent to frequently accessed aggressor rows, rather than performing global refresh operations on all rows. This localized approach reduces the overall refresh overhead and maintains higher memory performance while still protecting vulnerable data.
Solution Approach 2:
The patent segments the memory refresh operation by dividing rows into aggressor rows (frequently accessed) and victim rows (adjacent rows needing protection). By segmenting the refresh task based on actual row hammering patterns detected through PRHT monitoring, the system refreshes only the necessary portions of memory, improving overall efficiency.
3Measurement precision
If PRHT memory cells are added to track activation counts, then row hammering detection capability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the PRHT memory cells with the existing memory cell structure, using the same basic cell architecture (transistor-capacitor pairs) for both normal data storage and activation counting. The PRHT cells are integrated into the same memory array, sharing common bitlines and control structures, which reduces overall device complexity compared to having separate dedicated counting circuits.
Solution Approach 2:
The PRHT memory cells serve multiple functions: they act as normal data storage cells when not being accessed for counting, and simultaneously function as activation counters when the row is frequently accessed. This multi-functionality reduces the need for dedicated counting hardware and simplifies the overall device structure.
Data Source
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AI summary
The present disclosure relates to operation methods of a memory device including multiple rows each including multiple memory cells. One example method includes receiving an active command for a first row from a memory controller, reading a first count from a per-row hammer tracking (PRHT) region of the first row, updating the first count to generate a first updated count, comparing the first updated count with one of first and second thresholds to generate a comparison result, wherein when the first row is adjacent to the given row, the first updated count is compared with the first threshold and when the first row is not adjacent to the given row, the first updated count is compared with the second threshold, outputting a target row address based on the comparison result, and performing a row hammer mitigation operation on a row corresponding to the target row address.