PRI Overhead Reduction for VM Migration Write Protection

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Solution Overview

Problem

Current systems incur significant overhead and inefficiency during virtual machine migration due to the need to recopy memory pages accessed by I/O devices, especially when write-access is involved, leading to increased latency and reduced performance.

Innovation Solution

The implementation of a Page Request Interface (PRI) overhead reduction system that generates and uses a migration page table or write-protection table to identify and exclude pages being migrated or write-protected from the recopying process, allowing devices to access memory without sending unnecessary Page Request Messages (PRMs), thereby reducing the need for PRI requests and responses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all memory pages are copied during VM migration, then data consistency is maintained, but migration time and system latency increase significantly

Engineering Contradiction:
Improvedata consistencyVSAvoidmigration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory space is segmented into two distinct ranges: a first range of memory addresses that are write-protected during migration, and a second range that remains accessible for normal operations. This segmentation allows the system to maintain data consistency for critical pages while enabling concurrent access for other pages, thereby reducing overall migration time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hypervisor pre-establishes write-protection on the first range of memory addresses before the actual migration begins. This preliminary action ensures that write operations are blocked in advance, preventing data inconsistencies during the migration process and eliminating the need for post-migration data reconciliation.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If write-access is allowed during memory migration, then device operations continue smoothly, but data integrity and consistency are compromised

Engineering Contradiction:
Improvedevice operation continuityVSAvoiddata integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

Write-protection is applied locally and selectively only to the first range of memory addresses that require protection during migration, while the second range of memory addresses maintains normal write-access permissions. This local quality approach allows device operations to continue smoothly for unaffected memory regions while preserving data integrity for critical migrated pages.

Inventive Principle:
Principle #3Local quality

3Reliability

If PRI requests are sent for every memory access during migration, then access control is maintained, but system throughput and performance are reduced

Engineering Contradiction:
Improveaccess controlVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The hypervisor performs preliminary actions by pre-establishing the page table with write-protection flags for the first range of memory addresses before device access occurs. This eliminates the need for devices to send PRI requests for every memory access, as the protection status is already predetermined in the page table, thereby significantly improving system throughput while maintaining access control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The page table structure is designed to self-indicate write-protection status for memory addresses, allowing the system to automatically enforce access control without requiring explicit PRI requests from devices. This self-service mechanism reduces the number of control messages and improves overall system productivity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11868796B2Page request interface overhead reduction for virtual machine migration and write protection in memory
Publication Date: 2024.01.09 RED HAT LLC
  • US11868796B2 patent drawing
  • US11868796B2 patent drawing
  • US11868796B2 patent drawing

AI summary

Page request interface overhead reduction for virtual machine migration and write protection in memory may be provided by generating a page table associated with the memory; in response to receiving a write-protection command to prevent write-access to data from a portion of the memory, write-protecting a first range of memory addresses comprising the data write protected from the portion of the memory, wherein a second range of memory addresses comprises data not write protected in the memory; and modifying the page table to include a page table entry associated with the first range of memory addresses being write-protected, wherein write access to a memory address in the first range of memory addresses by a device during write-protection is tracked.