Prime-State Clock Computing for Timing-Attack-Resistant Ciphers
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Solution Overview
Problem
Current computing systems are vulnerable to malware infections due to identical machine instructions on different processor chips, which can lead to significant vulnerabilities in infrastructure such as the Internet, air traffic control, and the electrical grid, as seen in recent cyber attacks like Mirai.
Innovation Solution
The development of clock computing machines that use prime numbers for time states and random prime clock machines to execute cryptographic ciphers, providing unique physical instantiations and obfuscating timing patterns, thereby enhancing cybersecurity by breaking up potential timing patterns and making reverse engineering more difficult.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional computing systems use identical machine instructions on different processor chips, then manufacturing and operation are simplified, but security vulnerability increases due to identical timing patterns that malware can exploit
Solution Approach 1:
The patent applies asymmetry by using prime number-based clock cycles for different processor chips. Each chip has a unique prime number of clock states (e.g., 7, 11, 13, 17, 19, 23, 29, 31, 37, 41, 43, 47, 53, 59, 61, 67, 71, 73, 79, 83, 89, 97), creating asymmetric timing patterns that break the symmetry exploited by malware. This asymmetric design maintains security while preserving standard computing functionality.
Solution Approach 2:
The patent changes the parameter of clock cycle states from traditional binary (2 states) or decimal (10 states) to prime numbers. This parameter change creates unique temporal signatures for each processor chip, making reverse engineering and malware propagation more difficult while maintaining the fundamental computing operations.
2Reliability
If clock computing machines use prime numbers for time states, then security is enhanced through unique execution paths, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent implements periodic action through clock machines that cycle through prime-numbered states repeatedly. Each processor chip executes instructions in periodic cycles corresponding to its assigned prime number (e.g., 7-cycle, 11-cycle, 13-cycle clocks). This periodic execution creates unique timing patterns that enhance cryptographic security while using standard periodic hardware mechanisms that are manufacturable with existing technology.
3Device complexity
If traditional binary clocks are used, then device simplicity is maintained, but cryptographic security and timing pattern obfuscation are reduced
Solution Approach 1:
The patent applies dynamics by transitioning from static binary clock states to dynamic prime-number-based clock cycles. The clock machines dynamically progress through a variable number of states (prime numbers) before resetting, creating dynamic timing patterns that vary by processor chip. This dynamic behavior enhances cryptographic security by preventing static analysis and timing attacks, while the underlying mechanism remains a standard clocking system.
Data Source
AI summary
A new computational machine is invented, called a clock machine, that is a novel alternative to computing machines (digital computers) based on logic gates. In an embodiment, computation is performed with one or more clock machines that use time, and can perform any Boolean function. In an embodiment, a cryptographic cipher is implemented with random clock machines, constructed from a non-deterministic process, wherein the compiled set of instructions (i.e., the implementation of the cryptographic procedure) is distinct on each device or chip that executes the cryptographic cipher. In an embodiment, by using a different set of clock machines to execute two different instances of the same cryptographic procedure, each execution of a procedure looks different to malware that may try to infect and subvert the cryptographic procedure. This cryptographic process helps hinder timing attacks. In an embodiment, a detailed implementation of the Midori cipher with random clock machines is described.