Replaceable Print Component Addressing for Reliable Sensor Readings

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current print apparatus systems face challenges in efficiently communicating and managing data between replaceable print components and the host print apparatus, particularly in terms of addressing and enabling different logic circuits for various functions, which affects the accuracy and reliability of operations such as fluid level sensing and sensor readings.

Innovation Solution

The implementation of a logic circuitry package with multiple addresses, where a first address is used for standard communication and a second address is enabled for specific tasks, allowing for selective activation of sensor functions and data processing, facilitating secure and reconfigurable communication protocols like I2C, to manage different sensor types and operations within the print apparatus.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple logic circuits are integrated into a single replaceable print apparatus component, then the functionality and versatility of the component is improved, but the complexity of addressing and managing these circuits increases

Engineering Contradiction:
Improvefunctionality of replaceable componentVSAvoidcomplexity of addressing logic circuits
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The logic circuit package is segmented into multiple independently addressable logic circuits, each capable of performing specific functions. This segmentation allows the host logic circuit to selectively activate only the required circuits for a given task, reducing the management complexity despite having multiple circuits integrated into a single replaceable component.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system implements dynamic address assignment where logic circuits can be selectively enabled and disabled based on operational requirements. The host logic circuit can dynamically configure which logic circuits within the replaceable component are active, allowing flexible management of multiple circuits without permanent complexity.

Inventive Principle:
Principle #15Dynamics

2Reliability

If selective activation of logic circuits is implemented, then the efficiency and reliability of sensor operations is improved, but the complexity of communication protocols increases

Engineering Contradiction:
Improvereliability of sensor operationsVSAvoidcomplexity of communication protocols
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The host logic circuit performs preliminary configuration by assigning specific tasks to logic circuits before activation. This preliminary action ensures that only the necessary circuits are enabled for each operation, improving reliability by avoiding conflicts while the protocol complexity is managed through structured pre-configuration steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where the host logic circuit monitors the status and performance of activated logic circuits. This feedback allows for dynamic adjustment and verification of circuit activation, ensuring reliable sensor operations while managing communication protocol complexity through status reporting and verification.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3691905B1Replaceable print apparatus component
Publication Date: 2021.04.07 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • EP3691905B1 patent drawingFigure 1~3
  • EP3691905B1 patent drawingFigure 4A~4B
  • EP3691905B1 patent drawingFigure 4C~4D

AI summary

A replaceable print apparatus component includes a print material reservoir, a print material within the reservoir and a sensing system including an integrated circuit configured to connect to and communicate over a digital bus. The sensing system includes at least one sensor, a digital controller, an analog to digital converter electrically coupled to the digital controller, and a memory array electrically coupled to the digital controller. The digital controller is configured to generate a clock signal for timing operations of the integrated circuit. The operations include initiating the at least one sensor based on values stored in the memory array and generating outputs of the at least one sensor via the analog to digital converter.