Print Head IC Buffer Areas Reduce Switching Noise
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Solution Overview
Problem
As the number of nozzles in ink jet printers increases to improve productivity, the integrated circuit apparatus faces malfunctions due to increased noise components from higher current supply, leading to potential failures in driving piezoelectric elements effectively.
Innovation Solution
A print head design with an integrated circuit apparatus that includes specific terminal groups and circuit blocks for driving piezoelectric elements, along with buffer areas to reduce noise interference, where the buffer areas are strategically placed between circuit blocks and a signal-operating circuit block to shield against switching noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of nozzles is increased to improve productivity, then the amount of ink ejected increases, but the current supplied to the integrated circuit apparatus increases causing noise components to increase and leading to potential malfunctions
Solution Approach 1:
The integrated circuit apparatus is divided into multiple circuit blocks (first circuit block, second circuit block, third circuit block, and fourth circuit block) that are spatially separated and functionally independent. This segmentation isolates noise-generating switching operations to specific blocks, preventing noise propagation across the entire circuit and reducing malfunction risk while supporting increased nozzle counts for higher productivity
Solution Approach 2:
A buffer circuit is introduced as an intermediary element between the circuit blocks to isolate and filter noise signals. The buffer circuit acts as a mediator that prevents direct noise transmission between switching operations and sensitive signal processing areas, thereby maintaining reliability while allowing increased current supply for higher ink ejection volumes
2Productivity
If the current supplied to the integrated circuit apparatus is increased to increase the amount of ink ejected, then productivity improves, but noise components increase causing the integrated circuit apparatus to malfunction
Solution Approach 1:
The noise generated by high-current switching operations is converted from a harmful factor into a manageable phenomenon by confining it to specific circuit blocks. The buffer circuit transforms the noise propagation problem into a localized issue that can be handled independently, allowing high current supply for increased ink ejection without compromising overall system reliability
Solution Approach 2:
Different regions of the integrated circuit apparatus are assigned different functional qualities: circuit blocks dedicated to switching operations tolerate and contain noise, while other blocks handle sensitive signal processing in noise-free zones. This local differentiation allows high current supply for productivity improvement while protecting noise-sensitive areas through spatial quality differentiation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the likelihood of integrated circuit malfunctions and print head failures, even with increased current supply, by minimizing noise impact on the circuitry, thus ensuring stable operation and improved productivity.
Implementation Method 1
a plurality of piezoelectric elements 60 to be driven by supply of drive signals
Data Source
AI summary
A print head includes: an integrated circuit apparatus that switches whether or not to supply drive signals to a plurality of piezoelectric elements, and includes a first circuit block that switches whether or not to supply the drive signal, a second circuit block that switches whether or not to supply the drive signal, a third circuit block that switches whether or not to supply the drive signal, a fourth circuit block, and a first buffer area, a second buffer area, and a third buffer area in which no circuit element is located, in which the first buffer area is located between the first circuit block and the fourth circuit block, the second buffer area is located between the second circuit block and the fourth circuit block, and the third buffer area is located between the third circuit block and the fourth circuit block.


