Printed Connection Structure for Semiconductor Package Short Circuit Prevention
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in preventing wire-to-wire short circuits and achieving compact, high-performance designs due to the increasing demand for smaller, high-speed electronic components.
Innovation Solution
A semiconductor package is designed with a connection structure formed by a print process, using a connection conductor to electrically connect pads on a chip to coupling terminals on a substrate, thereby preventing short circuits and enabling the stacking of chips while maintaining a reduced package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding method is used to electrically connect semiconductor chip to substrate, then electrical connection is achieved, but wire-to-wire short circuit risk increases and package size cannot be reduced further
Solution Approach 1:
The patent extracts the wire bonding step from the traditional connection process and replaces it with a printed connection structure. The connection conductor is directly formed on the substrate through printing, eliminating the need for separate wire bonding operations and reducing the risk of wire-to-wire short circuits while minimizing package size.
Solution Approach 2:
The patent replaces the mechanical wire bonding process with a printing-based connection structure. Instead of mechanically attaching wires to pads, the connection conductor is printed directly onto the substrate, creating a more reliable and compact electrical connection that eliminates wire-to-wire short circuit risks.
2Adaptability or versatility
If multiple semiconductor chips are stacked to increase integration, then functionality is enhanced, but complexity of connection structure increases and short circuit risk increases
Solution Approach 1:
The printed connection structure serves multiple functions: it provides electrical connection between chips and substrate, acts as an insulating support structure, and enables compact chip stacking. This multi-functional design reduces overall connection structure complexity while supporting enhanced chip stacking capabilities.
Solution Approach 2:
The connection structure acts as an intermediary element between stacked chips and the substrate, providing both electrical connection and structural support. This intermediary role simplifies the overall system by consolidating multiple functions into a single integrated component rather than requiring separate connection and support structures.
3Ease of manufacture
If conventional connection methods are used, then manufacturing process is simple, but manufacturing precision is insufficient to prevent short circuits
Solution Approach 1:
The patent changes the manufacturing parameter from wire bonding (mechanical attachment) to printing (material deposition). This parameter change enables both ease of manufacture through simple printing processes and high manufacturing precision through controlled material deposition, simultaneously achieving process simplicity and connection precision to prevent short circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents wire-to-wire short circuits and allows for the stacking of semiconductor chips, reducing package size and enhancing performance by using a connection structure that avoids direct contact between wires, facilitating the miniaturization of semiconductor packages.
Implementation Method 1
The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal
Data Source
AI summary
A semiconductor package may include a substrate including a first coupling terminal and a second coupling terminal, a first chip disposed on the substrate, the first chip including a first pad and a second pad, and a connection structure connecting the first coupling terminal to the first pad. A portion of the connection structure may be in contact with a first side surface of the first chip. The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal.