Printed Dopant Layers for Self-Aligned Transistors
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Solution Overview
Problem
Conventional MOS and thin film integrated circuits require multiple costly and time-consuming masking steps, ion implants, and plasma ash/wet stripping processes for doped films, which are inefficient and expensive.
Innovation Solution
A method involving the formation of semiconductor islands on a substrate, followed by printing dielectric layers with dopants and annealing to diffuse the dopants into the islands, eliminating the need for masking steps and using printed silicon ink as both active and gate layers, allowing for self-aligned structures and high-temperature compatibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional masking steps and ion implants are used for doped films, then precise dopant placement is achieved, but processing cost and time increase significantly
Solution Approach 1:
The dopant is pre-loaded into the dielectric layer during the printing process, eliminating the need for subsequent ion implantation steps. This preliminary incorporation of dopant material allows direct diffusion into the semiconductor layer during annealing, significantly reducing processing time while maintaining placement precision through controlled dielectric layer positioning.
Solution Approach 2:
The invention extracts and eliminates the masking steps from the conventional process flow. By using direct printing of dopant-containing dielectric layers, the masking and unmasking operations are removed entirely, reducing both processing time and complexity while achieving equivalent or superior dopant placement through digital printing control.
2Manufacturing precision
If multiple masking steps and plasma ash/wet stripping are used, then dopant pattern definition is achieved, but processing cost increases
Solution Approach 1:
The invention replaces the mechanical and chemical masking system with a digital printing system. Instead of using physical masks and chemical etchants for pattern definition, the dopant-containing dielectric is directly printed in the desired pattern, eliminating masking materials and associated chemical processing steps, thereby reducing manufacturing cost while maintaining pattern definition quality.
Solution Approach 2:
The dielectric layer serves multiple functions simultaneously: it acts as the dopant source, the pattern definition layer, and the insulating layer. This multi-functionality eliminates the need for separate masking layers and reduces the number of processing steps, lowering overall manufacturing cost while achieving precise dopant patterning.
3Device complexity
If printed silicon ink is used as active and gate layers, then self-aligned structures are achieved, but high-temperature processing compatibility is required
Solution Approach 1:
The invention merges the active layer and gate layer into a single printed silicon ink layer, which is then selectively patterned and annealed. This consolidation enables self-aligned structures where the gate is automatically positioned relative to the active region, reducing alignment complexity. The high-temperature annealing step simultaneously crystallizes the silicon and defines the final structure, making the process compatible with standard semiconductor manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces processing costs and time, enabling high-throughput production of thin film transistors with improved electrical characteristics, such as lower leakage currents and better threshold voltage scaling, while eliminating additional dielectric removal and patterning steps.
Implementation Method 1
annealing the dielectric layer and the semiconductor island sufficiently to diffuse a dopant from the dielectric layer into the semiconductor island
Implementation Method 2
annealing the dielectric layer and the semiconductor island sufficiently to diffuse a dopant from the dielectric layer into the semiconductor island
Data Source
AI summary
A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.