Printed Substrate Conductive Bars for High Current Power Rails
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Solution Overview
Problem
Existing methods for passing high currents on printed circuits or substrates are either expensive or prone to wiring errors, and are not well-suited for pluggable modules, especially when trying to achieve currents of 500 amps or more.
Innovation Solution
A printed substrate architecture featuring regularly spaced conductive link surfaces that interconnect multiple conductive bars during soldering, allowing high currents to pass through a 'power rail' rather than a single track, with the bars held by adhesive spots and soldered using conventional methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the width of conductive tracks is increased to pass high currents, then current capacity is improved, but manufacturing cost increases significantly
Solution Approach 1:
The patent divides a single wide conductive track into multiple narrower parallel tracks, each carrying a portion of the total current. This segmentation allows high current capacity to be achieved without requiring a single expensive wide track, thereby reducing manufacturing costs while maintaining the required power handling capability
Solution Approach 2:
The patent transitions from a two-dimensional planar track layout to a three-dimensional structure by adding vertical vias that connect multiple copper layers. This dimensional change allows current to flow through multiple layers simultaneously, effectively increasing current capacity without increasing the surface area or track width on any single layer
2Power
If the thickness of copper tracks is increased to pass higher currents, then current capacity is improved, but manufacturing cost increases
Solution Approach 1:
The patent uses multiple copper layers stacked vertically, connected by vias, to achieve high current capacity through the third dimension rather than increasing the thickness of a single layer. This approach maintains standard copper thickness per layer (35 μm) while achieving equivalent or superior current handling through multi-layer architecture
3Power
If laminated multi-layer technology with 210 μm copper is used to reach 250 A currents, then current capacity is improved, but manufacturing cost increases considerably
Solution Approach 1:
The patent segments the current path across multiple standard-thickness copper layers (35 μm each) rather than using a single thick copper layer (210 μm). By distributing the current load across multiple layers connected via vias, the patent achieves comparable current capacity using conventional manufacturing processes and materials
4Power
If a fully wired solution is used to pass high currents, then current capacity is improved, but wiring errors increase and adaptability to pluggable modules decreases
Solution Approach 1:
The patent uses printed conductive tracks that replicate the functionality of traditional wired connections but with the advantages of printed circuit board technology. These printed tracks provide consistent, error-free connections that are automatically generated during PCB manufacturing, eliminating manual wiring errors while maintaining high current capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the passage of high currents up to 500 A or more with standard copper thickness, reducing costs and avoiding wiring errors, while maintaining conventional assembly and soldering processes.
Implementation Method 1
the dimensions of said conductive link surfaces are adapted so that, on being heated in a reflow oven, solder paste deposited on an optionally offset zone of a conductive link surface comes to fill exactly the gap between the two adjacent conductive bars lying on said conductive link surface
Implementation Method 2
said conductive bars are held on the substrate by spots of adhesive
Data Source
AI summary
On a printed circuit or substrate board (10) designed to receive electronic components and having conductive tracks (12) printed on said board, one or more conductive bars (18) are provided that are mounted one after another between conductive link surfaces (140, 142, 144), the conductive bars (18) being electrically interconnected during a subsequent soldering process that is either a wave soldering process or a soldering process in a reflow oven.