Printed TFT Array Substrate With Channel-Defined Semiconductor Patterning
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Solution Overview
Problem
The manufacturing processes of thin film transistors in existing display panels are complex, leading to high production costs and suboptimal comprehensive performance due to numerous deposition and etching steps, resulting in inconsistencies in film layers.
Innovation Solution
An array substrate with a semiconductor layer directly printed in a printing opening defined by a channel defining layer, where the semiconductor layer overlaps with the source and drain electrodes, and the channel defining layer is disposed around the semiconductor layer, simplifying the preparation process and reducing production costs by preventing ink overflow during printing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple deposition and etching processes are used to prepare thin film transistors, then the film layers can be formed with desired structures, but the manufacturing process becomes complex and production costs increase
Solution Approach 1:
The patent combines multiple separate deposition and etching processes into a single integrated printing process. The printing process directly forms the semiconductor layer with the desired pattern and structure in one step, eliminating the need for multiple sequential deposition and etching operations, thereby simplifying the manufacturing process while maintaining film layer consistency
Solution Approach 2:
The patent replaces the mechanical/chemical processes of deposition and etching with a printing process. Instead of using complex deposition equipment and etching chemistry, the invention uses a printing mechanism to directly deposit and pattern the semiconductor material, significantly reducing process complexity
2Manufacturing precision
If multiple photomask processing steps are performed to form desired structures, then the thin film transistor structures can be precisely formed, but production costs increase and film consistency decreases due to processing deviations
Solution Approach 1:
The patent extracts and eliminates the photomask processing steps from the manufacturing process. By using a printing process that directly patterns the semiconductor layer without requiring photomasks, the invention removes the source of processing deviations and material waste associated with multiple photomask steps
Solution Approach 2:
The patent uses a printing process that creates a direct copy or replica of the desired semiconductor layer pattern. The printing process transfers the pattern directly onto the substrate with high precision, eliminating the need for iterative photomask processing and reducing both material waste and costs
3Reliability
If conventional thin film transistor manufacturing processes are used, then functional film layers can be formed, but the comprehensive performance of the array substrate is limited due to process complexity and inconsistencies
Solution Approach 1:
The patent performs preliminary action by directly printing the semiconductor layer with the final desired structure and pattern in one step. This preliminary formation of the complete semiconductor structure eliminates the need for subsequent processing steps, improving both production efficiency and device performance consistency
Solution Approach 2:
The patent changes the fundamental process parameter from multiple sequential deposition and etching steps to a single printing process. This parameter change transforms the manufacturing approach, enabling higher productivity while maintaining or improving thin film transistor performance through more consistent film formation
Data Source
AI summary
Embodiments of the present application provide an array substrate and a manufacturing method thereof, and a display panel. The array substrate includes a substrate, a source electrode, a drain electrode, a semiconductor layer, and a channel defining layer. The semiconductor layer is disposed between the source electrode and the drain electrode, and the semiconductor layer partially overlaps with the source electrode and the drain electrode. The channel defining layer is disposed around the semiconductor layer, and is correspondingly disposed on the source electrode and the drain electrode. When the semiconductor layer is prepared, the semiconductor layer is directly printed in a printing opening defined in the channel defining layer. Overflow of the semiconductor layer is prevented by the channel defining layer.