Printed Wiring Board Recessed Pads for Reliable Bump Formation
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Solution Overview
Problem
Existing printed wiring boards face issues with inconsistent bump formation and reduced connection reliability due to limited interface area between conductor pads and plating layers, leading to potential separation and impaired connectivity.
Innovation Solution
The printed wiring board design includes conductor pads with varying recess depths and diameter openings, allowing for the formation of bumps with distinct base and top plating layers, enhancing the interface area and connection reliability by forming recesses with specific dimensions and using metals with different melting points for stable attachment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the conductor pad surface is kept flat, then the manufacturing process is simple, but the interface area between conductor pad and plating layer is limited
Solution Approach 1:
The invention transitions from a two-dimensional flat conductor pad surface to a three-dimensional recessed structure. By forming recesses in the conductor pad surface, the interface area between the conductor pad and plating layer is significantly increased, improving connection reliability without adding complex external structures.
Solution Approach 2:
The conductor pad surface is segmented into multiple recess regions, each potentially with different dimensions and depths. This segmentation allows for optimized plating layer formation in different areas, enhancing the overall interface area and connection reliability while maintaining manufacturing feasibility.
2Adaptability or versatility
If all openings in solder resist layer have the same diameter, then the manufacturing process is simple, but bumps cannot be formed with different sizes for different connection requirements
Solution Approach 1:
Different openings in the solder resist layer are designed with different diameters according to the specific requirements of each bump. This local variation in opening size allows for formation of bumps with different sizes, enabling adaptability for power, ground, and signal lines with different connection requirements.
3Reliability
If only a single plating layer is formed, then the manufacturing process is simple, but the interface area between conductor pad and plating layer is insufficient
Solution Approach 1:
The plating layer structure transitions from a single-layer two-dimensional configuration to a multi-layer three-dimensional structure within the recesses. The base plating layer fills the recess and the top plating layer forms on top, creating a stepped configuration that significantly increases the interface area between the conductor pad and plating layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves connection reliability by increasing the interface length between conductor pads and plating layers, ensuring stable bump formation and reliable connections for power, ground, and signal lines.
Implementation Method 1
forming, on the first conductor pad, a first bump including a first base plating layer formed in the first opening of the solder resist layer and a first top plating layer formed on the first base plating layer
Implementation Method 2
the forming of the first bump includes forming the first base plating layer in the first opening, forming the first top plating layer on the first base plating layer, and reflowing the first top plating layer
Data Source
AI summary
A printed wiring board includes a base insulating layer, a conductor layer formed on the base layer and including first and second pads, a solder resist layer formed on the base layer, covering the conductor layer and having first opening exposing the first pad and second opening exposing the second pad, bumps including a first bump and a second bump such that the first bump is formed on the first conductor pad of the conductor layer and that the second bump is formed on the second conductor pad of the conductor layer. The second opening has diameter smaller than diameter of the first opening, the second bump has diameter smaller than diameter of the first bump, the first pad has a first recess formed on the first pad, the second pad has a second recess formed on the second pad, and the first recess is larger than the second recess.