Priority-Setting ADC Circuit for Faster Multi-Channel Updates
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Solution Overview
Problem
Existing multi-channel detecting circuits in switching power supplies face challenges in achieving a faster data updating rate without increasing costs by using multiple analog-to-digital converters.
Innovation Solution
A data processing circuit that assigns different output frequencies to sampled signals using a priority-setting circuit, ensuring timely updates for critical channels while using a single ADC circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If more analog-to-digital converters are used to increase the data updating rate, then the data updating rate is improved, but the cost increases
Solution Approach 1:
The patent applies dynamics by making the output frequency of sampled signals adjustable and variable based on priority levels. The priority-setting circuit dynamically assigns different output frequencies to different channels, allowing critical channels to have higher update rates while non-critical channels use lower rates, thereby optimizing the overall data updating rate without proportionally increasing the number of ADC circuits.
Solution Approach 2:
The patent changes the parameter of output frequency for different sampled signals based on their priority. By varying the output frequency parameter according to channel importance, the system achieves differentiated data updating rates for different channels using a single ADC circuit, thus improving productivity without increasing the quantity of ADC circuits.
2Quantity of substance
If a single ADC circuit is used to process all data from multiple channels, then the cost is reduced, but the data updating rate for important channels decreases
Solution Approach 1:
The patent applies local quality by assigning different output frequencies to different channels based on their priority levels. Critical channels receive higher output frequencies for faster updates, while non-critical channels use lower frequencies, ensuring that important channels maintain high data updating rates even when using a single ADC circuit.
Solution Approach 2:
The priority-setting circuit dynamically adjusts the output frequency of each channel based on its priority, allowing the single ADC circuit to adaptively allocate processing resources to important channels, thereby maintaining high data updating rates for critical data without requiring multiple ADC circuits.
3Productivity
If different output frequencies are assigned to sampled signals based on priority, then the data processing efficiency is improved, but the device complexity increases
Solution Approach 1:
The priority-setting circuit serves multiple functions: it receives sampled signals from multiple channels, determines their priorities, assigns different output frequencies based on priority levels, and outputs the processed signals. This multi-functional design improves data processing efficiency without requiring separate complex circuits for each function, thereby limiting the increase in device complexity.
Data Source
AI summary
A multi-channel detecting circuit including a priority-setting circuit and an ADC (analog-to-digital converting) circuit is provided. The priority-setting circuit receives a plurality of sampled signals and a set signal, and provides the plurality of sampled signals at different output frequencies determined by the set signal. The ADC circuit receives the plurality of sampled signals, and respectively converts the plurality of sampled signals to a plurality of digital signals one by one.