Priority Arbiter for Microprocessor Instruction Fetching
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Solution Overview
Problem
In multithreaded microprocessor systems, efficient arbitration between instruction fetching for different threads is challenging, especially when there are more threads than sources of instruction data, leading to suboptimal utilization and potential stalling due to uneven workloads and resource conflicts.
Innovation Solution
A method for prioritizing instruction fetching based on metrics such as the number of instructions buffered and execution deadlines, using a priority arbiter to determine the order in which threads access instruction sources, ensuring that threads with the highest priority, typically those with empty or nearly empty instruction buffers, are given access first.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple threads compete for access to limited instruction sources, then instruction fetching efficiency deteriorates, but increasing the number of instruction sources increases device complexity
Solution Approach 1:
The system performs preliminary actions by determining priority orders for threads before actual instruction fetching occurs. The priority arbiter establishes a hierarchical structure in advance, allowing efficient arbitration when multiple threads compete for limited instruction sources without requiring additional physical instruction sources.
Solution Approach 2:
The arbitration mechanism segments the instruction fetching process into priority-based stages. Instead of allowing all threads to compete simultaneously for all sources, the system divides access into hierarchical levels based on priority orders, enabling multiple threads to access instructions in an organized manner without increasing the number of physical sources.
2Productivity
If instruction buffers are kept full for all threads, then system utilization improves, but memory bandwidth requirements increase
Solution Approach 1:
The system dynamically adjusts instruction buffer management based on thread priority and actual execution needs. Instead of statically allocating equal buffer resources to all threads, the priority arbiter dynamically directs memory bandwidth to threads with higher priority or greater need, optimizing system utilization without requiring excessive memory bandwidth for all threads simultaneously.
3Productivity
If arbitration is implemented for instruction fetching, then instruction data optimization improves, but arbitration complexity increases
Solution Approach 1:
The arbitration system changes parameters by using priority orders as the primary arbitration criterion. Instead of implementing complex real-time analysis of thread states, the system uses pre-determined priority parameters that simplify the arbitration logic while still achieving optimized instruction data distribution based on thread importance and buffer status.
Data Source
AI summary
A method and a system are provided for prioritising the fetching of instructions for each of a plurality of executing instruction threads in a multi-threaded processor. Instructions come from at least one source of instructions. Each thread has a number of threads buffered for execution in an instruction buffer. A first metric for each thread is determined based on the number of instructions currently buffered. A second metric is then determined for each thread, this being an execution based metric. A priority order for the threads is determined from the first and second metrics, and an instruction is fetched from the source for the thread with the highest determined priority which is requesting an instruction.