Priority-Based Compressed Memory Line Access
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Solution Overview
Problem
In processor-based systems, memory capacity compression increases latency and complexity due to the need for data uncompression during read access and compression during write access, as well as additional address translation steps, which complicates memory management.
Innovation Solution
Implementing a priority-based memory access system where higher priority data is accessed directly using logical memory addresses, reducing the need for address translation and allowing lower priority data to be stored in leftover spaces, thereby minimizing latency and maximizing memory efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory capacity compression is employed to increase effective memory capacity, then memory capacity is improved, but memory read access latency increases due to uncompression processing time
Solution Approach 1:
The patent segments memory lines into compressed and uncompressed portions, allowing selective access. High-priority data is stored in uncompressed portions that can be accessed directly without decompression, while low-priority data uses compressed storage. This segmentation resolves the contradiction by providing both compressed storage capacity and fast uncompressed access paths.
Solution Approach 2:
The patent applies different quality characteristics to different portions of memory lines. Some memory lines are fully uncompressed for fast access, while others are compressed for capacity efficiency. The system dynamically determines which memory lines to compress based on access patterns, applying local quality differentiation to resolve the latency-capacity tradeoff.
2Quantity of substance
If memory capacity compression is employed to increase effective memory capacity, then memory capacity is improved, but device complexity increases due to address translation and metadata management
Solution Approach 1:
The patent extracts the address translation complexity by using physical addresses directly as pointers to uncompressed memory line locations. Instead of requiring full virtual-to-physical address translation with metadata lookup, the system uses simplified address mapping for uncompressed data, taking out the complex translation layer for frequently accessed data while maintaining compression elsewhere.
Solution Approach 2:
The system dynamically adjusts which memory lines are compressed versus uncompressed based on access patterns and priority. Memory lines can transition between compressed and uncompressed states, allowing the system to optimize for both capacity and access speed without fixed complex management structures. This dynamic approach reduces the need for static metadata tables.
3Quantity of substance
If data is stored in compressed form to increase memory capacity, then memory capacity is improved, but memory write latency increases due to compression processing time
Solution Approach 1:
The patent applies compression partially rather than universally. Only low-priority data or data with high compressibility is compressed, while high-priority data is stored uncompressed. This partial action approach reduces overall write latency by avoiding compression for critical data while still achieving capacity benefits from compressing less time-sensitive data.
Data Source
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AI summary
Aspects disclosed relate to a priority-based access of compressed memory lines in a processor-based system. In an aspect, a memory access device in the processor-based system receives a read access request for memory. If the read access request is higher priority, the memory access device uses the logical memory address of the read access request as the physical memory address to access the compressed memory line. However, if the read access request is lower priority, the memory access device translates the logical memory address of the read access request into one or more physical memory addresses in memory space left by the compression of higher priority lines. In this manner, the efficiency of higher priority compressed memory accesses is improved by removing a level of indirection otherwise required to find and access compressed memory lines.