Priority Determination Circuit for Multi-Plane Storage Interference
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Solution Overview
Problem
In storage devices with multiple planes, existing technologies lack an efficient method to determine priority between overlapping operations of microcontrollers, leading to potential interference and inefficiencies in data storage and retrieval processes.
Innovation Solution
A priority determination circuit that receives request signals from multiple microcontrollers, determines priority using delayed signals and pointers, and generates response signals to manage operations, ensuring sequential and non-overlapping execution of commands across planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple microcontrollers operate simultaneously on multiple planes, then productivity increases, but overlapping operations cause interference and reliability decreases
Solution Approach 1:
The priority determination circuit determines the execution order of operations before they are executed. The request signal delay component delays request signals based on predetermined priorities, and the write/read pointer output circuit generates control signals in advance to prevent overlapping operations, ensuring reliable sequential execution while maintaining high productivity
Solution Approach 2:
The priority determination circuit acts as an intermediary between multiple microcontrollers and the memory planes. It receives request signals from multiple microcontrollers, determines priority, and generates response signals to control the execution order, preventing direct interference between simultaneous operations while maintaining system productivity
2Reliability
If priority determination is implemented to prevent overlapping operations, then reliability improves, but device complexity increases
Solution Approach 1:
The priority determination circuit is segmented into functional components: request signal delay component, write/read pointer output circuit, and response signal generator. Each component handles a specific aspect of priority determination, making the complex control function modular and manageable while ensuring reliable operation sequencing
Solution Approach 2:
The priority determination circuit serves multiple functions: delaying request signals, generating write/read pointers, determining priority, and producing response signals. This multi-functional design consolidates complex control logic into a single circuit that manages all aspects of operation sequencing, preventing overlapping while maintaining system reliability
Data Source
AI summary
Provided herein may be a priority determination circuit and a method of operating the priority determination circuit. The priority determination circuit may receive request signals from a plurality of microcontrollers respectively corresponding to the plurality of planes, and output response signals corresponding to the request signals depending on a determined priority.