Priority-Encoded Resource Domains for SoC Isolation Control

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Solution Overview

Problem

Existing systems lack a mechanism to define and enforce priority levels for resource domains, leading to potential interference and corruption when multiple operating systems or virtual machines share hardware resources, particularly in critical applications like automobiles.

Innovation Solution

The introduction of an Extended Resource Domain Controller (XRDC) with Master Domain Priority Level (MDPL) and Sub Domain Priority Level (SDPL) registers ensures that higher priority domains are never negatively impacted by lower priority domains, enforcing priority levels through hardware and software configuration, and managing transaction ordering and resource access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If virtualization techniques are used to share hardware with multiple operating systems, then hardware costs are reduced, but domain interference and performance issues occur between different operating systems

Engineering Contradiction:
Improvehardware costsVSAvoiddomain isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the resource access control into separate priority levels (Master Domain Priority Level and Sub Domain Priority Level) and uses domain identifiers to divide the system into isolated domains. This segmentation allows multiple operating systems to share hardware while maintaining clear boundaries and priority relationships, preventing interference between domains.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism through the domain access controller that mediates between different domains. The controller checks domain identifiers and priority levels before allowing resource access, acting as a buffer that prevents direct interference between operating systems while enabling controlled sharing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple operating systems share hardware resources, then system versatility is improved, but resource allocation conflicts and performance degradation occur

Engineering Contradiction:
Improvesystem versatilityVSAvoidresource allocation efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements dynamic priority management where the Master Domain Priority Level and Sub Domain Priority Level can be configured differently for different domains. This dynamic configuration allows the system to adapt resource allocation based on real-time needs of different operating systems, ensuring efficient resource distribution while maintaining versatility.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of priority level assignment to manage resource allocation conflicts. By assigning different priority levels to different domains and using these levels as decision criteria in the domain access controller, the system optimizes resource allocation efficiency while supporting multiple operating systems.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If domain priority levels are not enforced, then device complexity is reduced, but safety-critical domains may be delayed by non-critical ones

Engineering Contradiction:
Improvepriority management complexityVSAvoidsafety-critical domain performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent replaces complex software-based priority management with a hardware-enforced mechanism. The domain access controller uses hardware registers to store domain identifiers and priority levels, and hardware logic to automatically enforce priority-based access control. This substitution reduces software complexity while ensuring reliable priority enforcement for safety-critical domains.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12619468B2Hardware integrated, priority-encoded domains
Publication Date: 2026.05.05 NXP USA INC
  • US12619468B2 patent drawing
  • US12619468B2 patent drawing
  • US12619468B2 patent drawing

AI summary

Systems and methods for priority encoded domains in an SoC have been described. In an illustrative, non-limiting embodiment, a processing system in an SoC, may include: a core, and a domain access controller coupled to the core. The domain access controller may be configured to: receive a resource transaction request from a master device associated with a software-defined processing domain, and process the resource transaction request based upon a priority level of the software-defined processing domain. The domain access controller may also order a plurality of resource transaction requests based upon the associated respective priority levels, and provide the resource transaction requests to resources based on the order. A hypervisor can also use the priority levels of the software-defined processing domains to allocate a plurality of virtual machines to a plurality of processing cores according to the priority levels.