Priority Encoder for Floating Point Matrix Multiplication
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Solution Overview
Problem
Tree-based maximum circuits in floating point matrix multiplication datapaths become performance bottlenecks due to increased delay and difficulty in pipelining as the number of inputs doubles, limiting the design clock frequency and overall performance.
Innovation Solution
A circuit comprising detection subcircuits and a priority encoder that determines the active bit position from input data, reducing delay by comparing each exponent with possible values instead of between exponents, and is well-suited for pipelining by storing only a portion of the exponent.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If tree-based maximum circuits are used to compute the maximum of n exponents, then the circuit can handle multiple inputs, but the delay increases dramatically as the number of inputs doubles, limiting the design clock frequency
Solution Approach 1:
The patent segments the maximum computation problem into two independent parts: (1) finding the maximum exponent value, and (2) aligning mantissas based on that maximum. This segmentation allows parallel processing of exponent comparison and mantissa alignment, reducing overall delay. The exponent maximum computation is further segmented into bitwise comparison stages, where each stage processes one bit position across all exponents simultaneously, rather than sequentially comparing exponent pairs as in tree-based circuits.
Solution Approach 2:
The patent transitions from a sequential pairwise comparison approach (one dimension of computation) to a parallel bitwise comparison approach across multiple dimensions. Instead of comparing exponents in a binary tree structure where each level processes pairs of values, the patent compares all exponents simultaneously at each bit position, utilizing the bit-position dimension for parallelism. This dimensional change enables O(log max_exponent) delay instead of O(log n) delay where n is the number of inputs.
2Quantity of substance
If tree-based maximum circuits are implemented with increasing number of inputs, then more exponents can be processed, but the number of pipeline registers required increases, making pipelining difficult
Solution Approach 1:
The patent segments the pipelining requirement into minimal register stages: one register to store the computed maximum exponent value, and another to store the alignment shift amount. This segmentation reduces the pipeline register count from O(n) or O(log n) in tree-based circuits to just O(1) constant registers, enabling efficient pipelining while maintaining the ability to process any number of exponents.
3Productivity
If the depth of dot products increases to improve throughput, then more values can be computed per cycle, but tree-based maximum circuits become performance bottlenecks due to increased delay
Solution Approach 1:
The patent performs preliminary computation of the maximum exponent value before mantissa alignment is required. By computing the maximum exponent in advance using the efficient parallel bitwise comparison method, the alignment stage can proceed immediately without waiting for sequential exponent comparisons, thus enabling deeper dot product pipelines to execute without bottleneck delays.
Solution Approach 2:
The patent enables continuous useful action by allowing exponent maximum computation and mantissa alignment to proceed in parallel without idle waiting periods. The parallel bitwise comparison methodology ensures that all exponent bits are processed simultaneously at each stage, eliminating the sequential delays that would otherwise interrupt the continuous flow of dot product computations in deep pipelines.
Data Source
AI summary
In various embodiments, the maximum or minimum of multiple input values is determined. For each of a set of possible values, a corresponding detection result is set to indicate whether at least one of the input values matches the possible value. The detection results are used to ascertain the maximum or minimum of the multiple input values.