PRISM Memory for High-Speed Content Search
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Solution Overview
Problem
Current technologies face performance limitations in processing regular expressions at high network line rates, particularly in content search applications, due to the large number of states required for regular expression evaluation, leading to inefficiencies in memory usage and processing time, which cannot keep pace with emerging network speeds of 1 Gbps to 10 Gbps.
Innovation Solution
A Programmable Intelligent Search Memory (PRISM) technology that supports a large number of regular expressions on a single chip, enabling the creation of extensible Finite State Automata (FSAs) and efficient evaluation of complex regular expressions with interval representation, along with a compiler for converting regular expressions into a form suitable for PRISM-based search engines, allowing for simultaneous search of regular expressions and signature patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional microprocessors are used for regular expression evaluation, then processing capability is limited, but achieving high network line rates (1 Gbps to 10 Gbps) requires significantly improved processing speed
Solution Approach 1:
The patent segments the content search function into dedicated hardware components: PRISM memory for pattern storage, FSA logic for state machine evaluation, and parallel processing units. This segmentation allows simultaneous execution of multiple regular expression evaluations, achieving network line rate processing by dividing the monolithic microprocessor task into specialized parallel hardware units.
Solution Approach 2:
The patent replaces the mechanical/software-based microprocessor execution model with a hardware-based finite state automaton system. By substituting software interpretation with hardwired FSA logic and using programmable intelligent search memory instead of traditional CPU instruction execution, the system achieves deterministic high-speed processing at network line rates.
2Adaptability or versatility
If a large number of states are used for regular expression evaluation, then processing coverage is improved, but memory usage and processing time increase
Solution Approach 1:
The patent performs preliminary action by pre-compiling regular expressions into finite state automata representations and pre-loading patterns into PRISM memory. This offline compilation and pre-positioning of search patterns eliminates runtime compilation overhead and enables direct hardware acceleration, reducing processing time while maintaining support for complex regular expressions.
Solution Approach 2:
The patent implements dynamic state management in the FSA logic, allowing the finite state automaton to efficiently transition between states based on input data. The programmable nature of PRISM memory enables dynamic loading of different pattern sets, and the FSA logic dynamically adjusts state transitions to match actual data patterns, optimizing processing time for varying regex complexities.
3Productivity
If traditional memory architectures are used, then system simplicity is maintained, but achieving 100 Gbps search performance requires advanced memory technology
Solution Approach 1:
The patent implements universality by designing PRISM memory as a multi-functional programmable intelligent search memory that can store both fixed patterns and regular expression patterns, support multiple FSA configurations, and interface with various data sources. This universal memory architecture achieves 100 Gbps search performance by consolidating multiple specialized memory functions into a single reconfigurable unit, reducing overall system complexity despite the advanced technology employed.
Data Source
AI summary
Disclosed is a network computer system which may comprise a hardware processor which may comprise a programmable intelligent search memory for content search. The programmable intelligent search memory may perform regular expression based search. The programmable intelligent search memory may use at least one regular expression. The regular expression may be converted into at least one non-deterministic finite state automata (NFA) representing the functionality of the regular expression.