Private Address Peripheral for Secure CPU Microcode Execution
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Solution Overview
Problem
Implementing complex machine instructions using microcode is challenging due to the complexity of operations, and existing methods for interfacing CPU cores with external computational resources either increase system complexity and cost or compromise security by using public communication buses.
Innovation Solution
Assigning a private address to a peripheral device on a public communication bus, allowing secure communication between the CPU core and the peripheral device without revealing the address to other entities, using private registers to manage this address and ensuring that only the CPU core can access it for implementing machine instructions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dedicated communication bus is provided between the CPU core and the external computational resource, then communication security is improved, but system complexity and cost increase
Solution Approach 1:
The patent introduces a peripheral device as an intermediary component between the CPU core and external computational resources. This peripheral device acts as a secure gateway that mediates all communications, providing authentication and encryption services. By placing this intermediary at the boundary of the secure zone, the system achieves strong security without requiring dedicated secure buses for every component, thus resolving the contradiction between security and system complexity.
2Device complexity
If an existing public communication bus is employed for communicating with the external computational resource, then system complexity is reduced, but security is compromised due to potential monitoring and interference by malicious entities
Solution Approach 1:
The patent applies local quality by creating a secure zone with enhanced security properties for specific components (CPU core and external computational resources) while allowing the rest of the system to use the public bus. The peripheral device implements local security measures such as authentication and encryption only for communications within the secure zone, rather than securing the entire bus system. This localized approach maintains low overall system complexity while protecting critical communications.
3Manufacturing precision
If microcode is customized to a particular processor micro-architecture for implementing machine instructions, then implementation precision is improved, but adaptability to different architectures decreases
Solution Approach 1:
The patent extracts the architecture-specific implementation details from the machine instruction execution flow and places them in dedicated peripheral devices. The CPU core executes standardized machine instructions that are architecture-agnostic, while the peripheral devices handle the specific computational tasks that require architecture-dependent optimizations. This separation allows the core to maintain high adaptability across different architectures while peripheral devices provide precise, optimized implementations for specific architectures.
Data Source
AI summary
A method includes executing microcode in a processing unit of a processor to implement a machine instruction, wherein the microcode is to manipulate the processing unit to access a peripheral device on a public communication bus at a private address not visible to other devices on the public communication bus and not specified in the machine instruction. A processor includes a public communication bus, a peripheral device coupled to the public communication bus, and a processing unit. The processing unit is to execute microcode to implement a machine instruction. The microcode is to manipulate the processing unit to access a peripheral device on a public communication bus at a private address not visible to other devices on the public communication bus and not specified in the machine instruction.