PRNG Dither Control Circuit for PLL Spur Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase locked loop (PLL) systems in communication and signal processing systems face challenges in achieving high frequency resolution and reducing spurious components, particularly due to the limitations of existing dithering methods which do not effectively randomize the output signals and improve phase noise properties.
Innovation Solution
A dither control circuit incorporating a pseudo random number generator (PRNG) and a dither circuit that dithers a digital code using the PRNG's output bits, combined with an accumulator and frequency divider, to generate a frequency-divided clock signal that enhances frequency resolution and reduces spurious components by randomizing the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing dithering methods are used in PLL systems, then the implementation is simpler, but frequency resolution and phase noise performance are insufficient
Solution Approach 1:
A pseudo-random number generator (PRNG) is introduced as an intermediary component to generate dither sequences that are applied to the digital code before the accumulator. This mediator randomizes the quantization errors and improves frequency resolution without requiring complex high-order sigma-delta modulation circuits, thus resolving the contradiction between measurement precision and device complexity.
2Object-generated harmful factors
If existing dithering methods are used in PLL systems, then the circuit structure is simpler, but spurious components are not effectively reduced
Solution Approach 1:
The PRNG acts as an intermediary that randomizes the dither signal, which effectively suppresses spurious components by distributing them across the frequency spectrum as noise rather than concentrated discrete tones. This approach reduces harmful spurious components without requiring complex circuit structures.
3Measurement precision
If high-order sigma delta modulation circuits are used, then frequency resolution is improved, but the device area and complexity increase
Solution Approach 1:
Instead of using complex high-order sigma-delta modulation circuits that occupy large area, the patent employs a simpler PRNG-based dither control circuit that achieves comparable or superior frequency resolution. The PRNG generates pseudo-random sequences that effectively randomize quantization errors, providing a compact alternative to bulky high-order modulators.
Data Source
AI summary
A dither control circuit includes a pseudo random number generator, which generates a pseudo random number sequence in response to a frequency-divided clock signal, and a dither circuit which dithers an input digital code by using at least one output bit of the pseudo random number sequence and outputs a dithered digital code corresponding to a result of the dithering. The dither circuit may output, as the dithered digital code, a digital code corresponding to a sum of or a difference between the input digital code and the input digital code based on the at least one output bit. The dithered digital code may be input to an accumulator which operates in-sync with the frequency-divided clock signal.